Manish Pandey 188f8c4b60 feat(cm): handle asymmetry for SPE feature ... With introduction of FEAT_STATE_CHECK_ASYMMETRIC, the asymmetry of cores can be handled. SPE is one of the features which can be asymmetric across cores. Add a function to handle this asymmetry by re-visting the feature presence on running core. There are two possible cases: - If the primary has the feature and secondary does not have it then, the feature needs to be disabled. - If the primary does not have the feature and secondary has it then, the feature need to be enabled Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ibb2b88b5ef63b3efcb80801898ae8d8967e5c271		2024-08-17 09:36:10 +01:00
..
aarch32	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
aarch64	feat(cm): handle asymmetry for SPE feature	2024-08-17 09:36:10 +01:00
cpu_data_array.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00