mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-23 21:44:15 +00:00
14cf32aaa7
This patch adds an API to configure up the base USDHC clocks, taking a bit-mask of silicon specific bits as an input from a higher layer in order to direct the necessary clock source. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
100 lines
2.4 KiB
C
100 lines
2.4 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <mmio.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <imx_regs.h>
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#include <imx_clock.h>
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void imx_clock_target_set(unsigned int id, uint32_t val)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_ROOT_CTRL_NUM)
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return;
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addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root;
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mmio_write_32(addr, val);
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}
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void imx_clock_target_clr(unsigned int id, uint32_t val)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_ROOT_CTRL_NUM)
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return;
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addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root_clr;
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mmio_write_32(addr, val);
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}
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void imx_clock_gate_enable(unsigned int id, bool enable)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_CLK_GATE_CTRL_NUM)
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return;
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/* TODO: add support for more than DOMAIN0 clocks */
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if (enable)
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addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_set;
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else
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addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_clr;
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mmio_write_32(addr, CCM_CCGR_SETTING0_DOM_CLK_ALWAYS);
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}
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void imx_clock_enable_uart(unsigned int uart_id, uint32_t uart_clk_en_bits)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_UART1_CLK_ROOT + uart_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_UART1 + uart_id;
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/* Check for error */
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if (uart_id > MXC_MAX_UART_NUM)
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return;
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/* Set target register values */
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imx_clock_target_set(ccm_trgt_id, uart_clk_en_bits);
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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void imx_clock_disable_uart(unsigned int uart_id)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_UART1_CLK_ROOT + uart_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_UART1 + uart_id;
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/* Check for error */
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if (uart_id > MXC_MAX_UART_NUM)
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return;
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/* Disable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, false);
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/* Clear the target */
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imx_clock_target_clr(ccm_trgt_id, 0xFFFFFFFF);
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}
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void imx_clock_enable_usdhc(unsigned int usdhc_id, uint32_t usdhc_clk_en_bits)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_USDHC1_CLK_ROOT + usdhc_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_USBHDC1 + usdhc_id;
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/* Check for error */
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if (usdhc_id > MXC_MAX_USDHC_NUM)
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return;
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/* Set target register values */
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imx_clock_target_set(ccm_trgt_id, usdhc_clk_en_bits);
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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