Varun Wadekar fbc44bd1bb Prevent RAS register access from lower ELs ... This patch adds a build config 'RAS_TRAP_LOWER_EL_ERR_ACCESS' to set SCR_EL3.TERR during CPU boot. This bit enables trapping RAS register accesses from EL1 or EL2 to EL3. RAS_TRAP_LOWER_EL_ERR_ACCESS is disabled by default. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ifb0fb0afedea7dd2a29a0b0491a1161ecd241438		2020-06-12 10:20:11 -07:00
..
fconf	doc: Add binding document for fconf.	2020-04-30 09:40:23 +01:00
spd	doc: Normalise section numbering and headings	2019-05-22 11:20:39 +01:00
arm-sip-service.rst	docs: Update SMCCC doc, other changes for release	2020-04-16 10:03:39 -05:00
debugfs-design.rst	doc: Fixup some SMCCC links	2020-04-17 14:06:54 +02:00
exception-handling.rst	docs: Update SMCCC doc, other changes for release	2020-04-16 10:03:39 -05:00
firmware-update.rst	doc: Misc syntax and spelling fixes	2019-10-11 12:39:06 +00:00
index.rst	SPCI is now called PSA FF-A	2020-05-25 08:55:36 +00:00
platform-interrupt-controller-API.rst	doc: Convert internal links to RST format	2019-10-08 15:58:03 +00:00
psa-ffa-manifest-binding.rst	doc: Fixes in PSA FF-A binding document	2020-05-25 08:55:55 +00:00
ras.rst	Prevent RAS register access from lower ELs	2020-06-12 10:20:11 -07:00
romlib-design.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
sdei.rst	doc: Convert internal links to RST format	2019-10-08 15:58:03 +00:00
secure-partition-manager-design.rst	docs: Update SMCCC doc, other changes for release	2020-04-16 10:03:39 -05:00
xlat-tables-lib-v2-design.rst	doc: Convert internal links to RST format	2019-10-08 15:58:03 +00:00