arm-trusted-firmware/lib/cpus/aarch64
Vikram Kanigiri 12e7c4ab0b Initialise cpu ops after enabling data cache
The cpu-ops pointer was initialized before enabling the data cache in the cold
and warm boot paths. This required a DCIVAC cache maintenance operation to
invalidate any stale cache lines resident in other cpus.

This patch moves this initialization to the bl31_arch_setup() function
which is always called after the data cache and MMU has been enabled.

This change removes the need:
 1. for the DCIVAC cache maintenance operation.
 2. to initialise the CPU ops upon resumption from a PSCI CPU_SUSPEND
    call since memory contents are always preserved in this case.

Change-Id: Ibb2fa2f7460d1a1f1e721242025e382734c204c6
2015-03-13 10:38:09 +00:00
..
aem_generic.S Add CPU specific crash reporting handlers 2014-08-20 19:14:31 +01:00
cortex_a53.S Fix the Cortex-A57 reset handler register usage 2015-01-30 13:57:57 +00:00
cortex_a57.S Fix the Cortex-A57 reset handler register usage 2015-01-30 13:57:57 +00:00
cpu_helpers.S Initialise cpu ops after enabling data cache 2015-03-13 10:38:09 +00:00