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https://github.com/ARM-software/arm-trusted-firmware.git
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12d0d00d1e
This patch introduces new platform APIs and context management helper APIs to support the new topology framework based on linear core position. This framework will be introduced in the follwoing patch and it removes the assumption that the MPIDR based affinity levels map directly to levels in a power domain tree. The new platforms APIs and context management helpers based on core position are as described below: * plat_my_core_pos() and plat_core_pos_by_mpidr() These 2 new mandatory platform APIs are meant to replace the existing 'platform_get_core_pos()' API. The 'plat_my_core_pos()' API returns the linear index of the calling core and 'plat_core_pos_by_mpidr()' returns the linear index of a core specified by its MPIDR. The latter API will also validate the MPIDR passed as an argument and will return an error code (-1) if an invalid MPIDR is passed as the argument. This enables the caller to safely convert an MPIDR of another core to its linear index without querying the PSCI topology tree e.g. during a call to PSCI CPU_ON. Since the 'plat_core_pos_by_mpidr()' API verifies an MPIDR, which is always platform specific, it is no longer possible to maintain a default implementation of this API. Also it might not be possible for a platform port to verify an MPIDR before the C runtime has been setup or the topology has been initialized. This would prevent 'plat_core_pos_by_mpidr()' from being callable prior to topology setup. As a result, the generic Trusted Firmware code does not call this API before the topology setup has been done. The 'plat_my_core_pos' API should be able to run without a C runtime. Since this API needs to return a core position which is equal to the one returned by 'plat_core_pos_by_mpidr()' API for the corresponding MPIDR, this too cannot have default implementation and is a mandatory API for platform ports. These APIs will be implemented by the ARM reference platform ports later in the patch stack. * plat_get_my_stack() and plat_set_my_stack() These APIs are the stack management APIs which set/return stack addresses appropriate for the calling core. These replace the 'platform_get_stack()' and 'platform_set_stack()' APIs. A default weak MP version and a global UP version of these APIs are provided for the platforms. * Context management helpers based on linear core position A set of new context management(CM) helpers viz cm_get_context_by_index(), cm_set_context_by_index(), cm_init_my_context() and cm_init_context_by_index() are defined which are meant to replace the old helpers which took MPIDR as argument. The old CM helpers are implemented based on the new helpers to allow for code consolidation and will be deprecated once the switch to the new framework is done. Change-Id: I89758632b370c2812973a4b2efdd9b81a41f9b69
183 lines
6.9 KiB
C
183 lines
6.9 KiB
C
/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PSCI_PRIVATE_H__
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#define __PSCI_PRIVATE_H__
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#include <arch.h>
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#include <bakery_lock.h>
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#include <bl_common.h>
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#include <psci.h>
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/*
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* The following helper macros abstract the interface to the Bakery
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* Lock API.
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*/
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#if USE_COHERENT_MEM
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#define psci_lock_init(pwr_map, idx) bakery_lock_init(&(pwr_map)[(idx)].lock)
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#define psci_lock_get(node) bakery_lock_get(&((node)->lock))
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#define psci_lock_release(node) bakery_lock_release(&((node)->lock))
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#else
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#define psci_lock_init(pwr_map, idx) \
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((pwr_map)[(idx)].pwr_domain_index = (idx))
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#define psci_lock_get(node) \
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bakery_lock_get((node)->pwr_domain_index,\
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CPU_DATA_PSCI_LOCK_OFFSET)
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#define psci_lock_release(node) \
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bakery_lock_release((node)->pwr_domain_index,\
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CPU_DATA_PSCI_LOCK_OFFSET)
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#endif
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/*
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* The PSCI capability which are provided by the generic code but does not
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* depend on the platform or spd capabilities.
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*/
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#define PSCI_GENERIC_CAP \
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(define_psci_cap(PSCI_VERSION) | \
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define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
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define_psci_cap(PSCI_FEATURES))
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/*
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* The PSCI capabilities mask for 64 bit functions.
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*/
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#define PSCI_CAP_64BIT_MASK \
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(define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \
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define_psci_cap(PSCI_CPU_ON_AARCH64) | \
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define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
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define_psci_cap(PSCI_MIG_AARCH64) | \
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define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \
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define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64))
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/*******************************************************************************
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* The following two data structures hold the topology tree which in turn tracks
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* the state of the all the power domain instances supported by the platform.
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******************************************************************************/
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typedef struct pwr_map_node {
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unsigned long mpidr;
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unsigned char ref_count;
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unsigned char state;
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unsigned char level;
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#if USE_COHERENT_MEM
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bakery_lock_t lock;
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#else
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/* For indexing the bakery_info array in per CPU data */
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unsigned char pwr_domain_index;
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#endif
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} pwr_map_node_t;
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typedef struct pwr_lvl_limits_node {
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int min;
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int max;
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} pwr_lvl_limits_node_t;
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typedef pwr_map_node_t (*mpidr_pwr_map_nodes_t[MPIDR_MAX_AFFLVL + 1]);
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typedef void (*pwrlvl_power_on_finisher_t)(pwr_map_node_t *mpidr_nodes[],
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int pwrlvl);
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/*******************************************************************************
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* Data prototypes
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******************************************************************************/
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extern const plat_pm_ops_t *psci_plat_pm_ops;
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extern pwr_map_node_t psci_pwr_domain_map[PSCI_NUM_PWR_DOMAINS];
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extern pwr_lvl_limits_node_t psci_pwr_domain_map[MPIDR_MAX_AFFLVL + 1];
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extern uint32_t psci_caps;
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/*******************************************************************************
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* SPD's power management hooks registered with PSCI
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******************************************************************************/
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extern const spd_pm_ops_t *psci_spd_pm;
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/*******************************************************************************
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* Function prototypes
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******************************************************************************/
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/* Private exported functions from psci_common.c */
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unsigned short psci_get_state(pwr_map_node_t *node);
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unsigned short psci_get_phys_state(pwr_map_node_t *node);
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void psci_set_state(pwr_map_node_t *node, unsigned short state);
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unsigned long mpidr_set_pwr_domain_inst(unsigned long, unsigned char, int);
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int psci_validate_mpidr(unsigned long mpidr);
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int get_power_on_target_pwrlvl(void);
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void psci_power_up_finish(int end_pwrlvl,
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pwrlvl_power_on_finisher_t pon_handler);
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int psci_get_ns_ep_info(entry_point_info_t *ep,
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uint64_t entrypoint, uint64_t context_id);
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int psci_check_pwrlvl_range(int start_pwrlvl, int end_pwrlvl);
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void psci_do_state_coordination(uint32_t start_pwrlvl,
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uint32_t end_pwrlvl,
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pwr_map_node_t *mpidr_nodes[],
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uint32_t state);
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void psci_acquire_pwr_domain_locks(int start_pwrlvl,
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int end_pwrlvl,
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pwr_map_node_t *mpidr_nodes[]);
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void psci_release_pwr_domain_locks(int start_pwrlvl,
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int end_pwrlvl,
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mpidr_pwr_map_nodes_t mpidr_nodes);
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void psci_print_power_domain_map(void);
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uint32_t psci_find_max_phys_off_pwrlvl(uint32_t start_pwrlvl,
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uint32_t end_pwrlvl,
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pwr_map_node_t *mpidr_nodes[]);
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unsigned int psci_is_last_on_cpu(void);
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int psci_spd_migrate_info(uint64_t *mpidr);
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/* Private exported functions from psci_setup.c */
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int psci_get_pwr_map_nodes(unsigned long mpidr,
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int start_pwrlvl,
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int end_pwrlvl,
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pwr_map_node_t *mpidr_nodes[]);
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pwr_map_node_t *psci_get_pwr_map_node(unsigned long, int);
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/* Private exported functions from psci_cpu_on.c */
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int psci_cpu_on_start(unsigned long target_cpu,
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entry_point_info_t *ep,
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int end_pwrlvl);
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void psci_cpu_on_finish(pwr_map_node_t *node[], int pwrlvl);
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/* Private exported functions from psci_cpu_off.c */
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int psci_do_cpu_off(int end_pwrlvl);
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/* Private exported functions from psci_cpu_suspend.c */
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void psci_cpu_suspend_start(entry_point_info_t *ep,
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int end_pwrlvl);
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void psci_cpu_suspend_finish(pwr_map_node_t *node[], int pwrlvl);
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void psci_set_suspend_power_state(unsigned int power_state);
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/* Private exported functions from psci_helpers.S */
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void psci_do_pwrdown_cache_maintenance(uint32_t pwr_level);
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void psci_do_pwrup_cache_maintenance(void);
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/* Private exported functions from psci_system_off.c */
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void __dead2 psci_system_off(void);
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void __dead2 psci_system_reset(void);
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#endif /* __PSCI_PRIVATE_H__ */
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