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Currently MDCR_EL3 register value is same for all the worlds(Non-secure, Secure, Realm and Root). With this approach, features enable/disable settings remain same across all the worlds. This is not ideal as there must be flexibility in controlling feature as per the requirements for individual world. The patch addresses this by providing MDCR_EL3 a per world value. Features with identical values for all the worlds are grouped under ``manage_extensions_common`` API. Change-Id: Ibc068d985fe165d8cb6d0ffb84119bffd743b3d1 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
40 lines
1 KiB
C
40 lines
1 KiB
C
/*
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* Copyright (c) 2021-2024, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <lib/extensions/trf.h>
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void trf_enable(cpu_context_t *ctx)
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{
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el3_state_t *state = get_el3state_ctx(ctx);
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u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3);
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/*
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* MDCR_EL3.STE = b0
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* Trace prohibited in Secure state unless overridden by the
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* IMPLEMENTATION DEFINED authentication interface.
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*
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* MDCR_EL3.TTRF = b0
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* Allow access of trace filter control registers from NS-EL2
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* and NS-EL1 when NS-EL2 is implemented but not used
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*/
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mdcr_el3_val &= ~(MDCR_STE_BIT | MDCR_TTRF_BIT);
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write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
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}
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void trf_init_el2_unused(void)
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{
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/*
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* MDCR_EL2.TTRF: Set to zero so that access to Trace
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* Filter Control register TRFCR_EL1 at EL1 is not
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* trapped to EL2. This bit is RES0 in versions of
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* the architecture earlier than ARMv8.4.
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*
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*/
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write_mdcr_el2(read_mdcr_el2() & ~MDCR_EL2_TTRF);
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}
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