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https://github.com/ARM-software/arm-trusted-firmware.git
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1a0a3f0622
This patch adds common changes to support AArch32 state in BL1 and BL2. Following are the changes: * Added functions for disabling MMU from Secure state. * Added AArch32 specific SMC function. * Added semihosting support. * Added reporting of unhandled exceptions. * Added uniprocessor stack support. * Added `el3_entrypoint_common` macro that can be shared by BL1 and BL32 (SP_MIN) BL stages. The `el3_entrypoint_common` is similar to the AArch64 counterpart with the main difference in the assembly instructions and the registers that are relevant to AArch32 execution state. * Enabled `LOAD_IMAGE_V2` flag in Makefile for `ARCH=aarch32` and added check to make sure that platform has not overridden to disable it. Change-Id: I33c6d8dfefb2e5d142fdfd06a0f4a7332962e1a3
140 lines
5.6 KiB
C
140 lines
5.6 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __COMMON_DEF_H__
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#define __COMMON_DEF_H__
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#include <bl_common.h>
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#include <platform_def.h>
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/******************************************************************************
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* Required platform porting definitions that are expected to be common to
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* all platforms
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*****************************************************************************/
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/*
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* Platform binary types for linking
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*/
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#ifdef AARCH32
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#define PLATFORM_LINKER_FORMAT "elf32-littlearm"
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#define PLATFORM_LINKER_ARCH arm
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#else
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#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
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#define PLATFORM_LINKER_ARCH aarch64
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#endif /* AARCH32 */
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/*
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* Generic platform constants
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*/
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#define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n"
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/*
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* Some of the platform porting definitions use the 'ull' suffix in order to
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* avoid subtle integer overflow errors due to implicit integer type promotion
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* when working with 32-bit values.
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*
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* The TSP linker script includes some of these definitions to define the BL32
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* memory map, but the GNU LD does not support the 'ull' suffix, causing the
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* build process to fail. To solve this problem, the auxiliary macro MAKE_ULL(x)
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* will add the 'ull' suffix only when the macro __LINKER__ is not defined
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* (__LINKER__ is defined in the command line to preprocess the linker script).
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* Constants in the linker script will not have the 'ull' suffix, but this is
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* not a problem since the linker evaluates all constant expressions to 64 bit
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* (assuming the target architecture is 64 bit).
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*/
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#ifndef __LINKER__
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#define MAKE_ULL(x) x##ull
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#else
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#define MAKE_ULL(x) x
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#endif
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#if LOAD_IMAGE_V2
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#define BL2_IMAGE_DESC { \
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.image_id = BL2_IMAGE_ID, \
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
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VERSION_2, image_info_t, 0), \
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.image_info.image_base = BL2_BASE, \
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.image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
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VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
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.ep_info.pc = BL2_BASE, \
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}
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#else /* LOAD_IMAGE_V2 */
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#define BL2_IMAGE_DESC { \
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.image_id = BL2_IMAGE_ID, \
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
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VERSION_1, image_info_t, 0), \
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.image_info.image_base = BL2_BASE, \
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
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VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),\
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.ep_info.pc = BL2_BASE, \
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}
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#endif /* LOAD_IMAGE_V2 */
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/*
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* The following constants identify the extents of the code & read-only data
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* regions. These addresses are used by the MMU setup code and therefore they
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* must be page-aligned.
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*
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* When the code and read-only data are mapped as a single atomic section
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* (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
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* code by specifying the read-only data section as empty.
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*
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* BL1 is different than the other images in the sense that its read-write data
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* originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
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* run-time. Therefore, the read-write data in ROM can be mapped with the same
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* memory attributes as the read-only data region. For this reason, BL1 uses
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* different macros.
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*
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* Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
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* just points to the end of BL1's actual content in Trusted ROM. Therefore it
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* needs to be rounded up to the next page size in order to map the whole last
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* page of it with the right memory attributes.
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*/
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#if SEPARATE_CODE_AND_RODATA
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#define BL_CODE_BASE (unsigned long)(&__TEXT_START__)
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#define BL_CODE_LIMIT (unsigned long)(&__TEXT_END__)
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#define BL_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
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#define BL_RO_DATA_LIMIT (unsigned long)(&__RODATA_END__)
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#define BL1_CODE_LIMIT BL_CODE_LIMIT
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#define BL1_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
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#define BL1_RO_DATA_LIMIT round_up(BL1_ROM_END, PAGE_SIZE)
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#else
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#define BL_CODE_BASE (unsigned long)(&__RO_START__)
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#define BL_CODE_LIMIT (unsigned long)(&__RO_END__)
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#define BL_RO_DATA_BASE 0
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#define BL_RO_DATA_LIMIT 0
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#define BL1_CODE_LIMIT round_up(BL1_ROM_END, PAGE_SIZE)
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#define BL1_RO_DATA_BASE 0
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#define BL1_RO_DATA_LIMIT 0
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#endif /* SEPARATE_CODE_AND_RODATA */
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#endif /* __COMMON_DEF_H__ */
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