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https://github.com/ARM-software/arm-trusted-firmware.git
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10a511ceaa
The DDR driver is under dual license, BSD and GPLv2. The configuration parameters are taken from device tree. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
78 lines
2.2 KiB
C
78 lines
2.2 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <debug.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <mmio.h>
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#include <stdint.h>
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#include <stm32mp1_clk.h>
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#include <stm32mp1_dt.h>
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#include <stm32mp1_private.h>
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#include <stm32mp1_rcc.h>
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#include <tzc400.h>
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#include "platform_def.h"
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/*******************************************************************************
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* Initialize the TrustZone Controller.
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* Early initialization create only one region with full access to secure.
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* This setting is used before and during DDR initialization.
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******************************************************************************/
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static void early_init_tzc400(void)
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{
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uint32_t rstsr, rst_standby;
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rstsr = mmio_read_32(RCC_BASE + RCC_MP_RSTSCLRR);
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/* No warning if return from (C)STANDBY */
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rst_standby = rstsr &
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(RCC_MP_RSTSCLRR_STDBYRSTF | RCC_MP_RSTSCLRR_CSTDBYRSTF);
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if (stm32mp1_clk_is_enabled(TZC1) && (rst_standby == 0U)) {
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WARN("TZC400 port 1 clock already enable\n");
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}
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if (stm32mp1_clk_is_enabled(TZC2) && (rst_standby == 0U)) {
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WARN("TZC400 port 2 clock already enable\n");
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}
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if (stm32mp1_clk_enable(TZC1) != 0) {
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ERROR("Cannot enable TZC1 clock\n");
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panic();
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}
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if (stm32mp1_clk_enable(TZC2) != 0) {
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ERROR("Cannot enable TZC2 clock\n");
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panic();
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}
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tzc400_init(STM32MP1_TZC_BASE);
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tzc400_disable_filters();
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/*
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* Region 1 set to cover Non-Secure DRAM at 0x8000_0000. Apply the
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* same configuration to all filters in the TZC.
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*/
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tzc400_configure_region(STM32MP1_FILTER_BIT_ALL, 1,
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STM32MP1_DDR_BASE,
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STM32MP1_DDR_BASE +
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(STM32MP1_DDR_MAX_SIZE - 1U),
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TZC_REGION_S_RDWR,
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID));
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/* Raise an exception if a NS device tries to access secure memory */
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tzc400_set_action(TZC_ACTION_ERR);
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tzc400_enable_filters();
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}
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/*******************************************************************************
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* Initialize the secure environment. At this moment only the TrustZone
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* Controller is initialized.
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******************************************************************************/
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void stm32mp1_arch_security_setup(void)
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{
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early_init_tzc400();
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}
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