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10a511ceaa
The DDR driver is under dual license, BSD and GPLv2. The configuration parameters are taken from device tree. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
83 lines
1.6 KiB
C
83 lines
1.6 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <assert.h>
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#include <bl_common.h>
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#include <debug.h>
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#include <gicv2.h>
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#include <mmio.h>
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#include <platform_def.h>
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#include <platform.h>
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#include <stm32mp1_private.h>
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#include <xlat_tables_v2.h>
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#define MAP_SRAM MAP_REGION_FLAT(STM32MP1_SRAM_BASE, \
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STM32MP1_SRAM_SIZE, \
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MT_MEMORY | \
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MT_RW | \
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MT_SECURE | \
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MT_EXECUTE_NEVER)
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#define MAP_DEVICE1 MAP_REGION_FLAT(STM32MP1_DEVICE1_BASE, \
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STM32MP1_DEVICE1_SIZE, \
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MT_DEVICE | \
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MT_RW | \
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MT_SECURE | \
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MT_EXECUTE_NEVER)
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#define MAP_DEVICE2 MAP_REGION_FLAT(STM32MP1_DEVICE2_BASE, \
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STM32MP1_DEVICE2_SIZE, \
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MT_DEVICE | \
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MT_RW | \
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MT_SECURE | \
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MT_EXECUTE_NEVER)
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#define MAP_DDR MAP_REGION_FLAT(STM32MP1_DDR_BASE, \
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STM32MP1_DDR_MAX_SIZE, \
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MT_MEMORY | \
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MT_RW | \
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MT_SECURE | \
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MT_EXECUTE_NEVER)
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static const mmap_region_t stm32mp1_mmap[] = {
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MAP_SRAM,
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MAP_DEVICE1,
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MAP_DEVICE2,
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MAP_DDR,
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{0}
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};
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void configure_mmu(void)
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{
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mmap_add(stm32mp1_mmap);
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init_xlat_tables();
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enable_mmu_secure(0);
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}
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uintptr_t plat_get_ns_image_entrypoint(void)
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{
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return BL33_BASE;
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}
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unsigned int plat_get_syscnt_freq2(void)
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{
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return read_cntfrq_el0();
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}
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/* Functions to save and get boot context address given by ROM code */
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static uintptr_t boot_ctx_address;
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void stm32mp1_save_boot_ctx_address(uintptr_t address)
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{
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boot_ctx_address = address;
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}
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uintptr_t stm32mp1_get_boot_ctx_address(void)
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{
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return boot_ctx_address;
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}
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