mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-21 03:54:34 +00:00
308d359b26
Introduce zeromem_dczva function on AArch64 that can handle unaligned addresses and make use of DC ZVA instruction to zero a whole block at a time. This zeroing takes place directly in the cache to speed it up without doing external memory access. Remove the zeromem16 function on AArch64 and replace it with an alias to zeromem. This zeromem16 function is now deprecated. Remove the 16-bytes alignment constraint on __BSS_START__ in firmware-design.md as it is now not mandatory anymore (it used to comply with zeromem16 requirements). Change the 16-bytes alignment constraints in SP min's linker script to a 8-bytes alignment constraint as the AArch32 zeromem implementation is now more efficient on 8-bytes aligned addresses. Introduce zero_normalmem and zeromem helpers in platform agnostic header that are implemented this way: * AArch32: * zero_normalmem: zero using usual data access * zeromem: alias for zero_normalmem * AArch64: * zero_normalmem: zero normal memory using DC ZVA instruction (needs MMU enabled) * zeromem: zero using usual data access Usage guidelines: in most cases, zero_normalmem should be preferred. There are 2 scenarios where zeromem (or memset) must be used instead: * Code that must run with MMU disabled (which means all memory is considered device memory for data accesses). * Code that fills device memory with null bytes. Optionally, the following rule can be applied if performance is important: * Code zeroing small areas (few bytes) that are not secrets should use memset to take advantage of compiler optimizations. Note: Code zeroing security-related critical information should use zero_normalmem/zeromem instead of memset to avoid removal by compilers' optimizations in some cases or misbehaving versions of GCC. Fixes ARM-software/tf-issues#408 Change-Id: Iafd9663fc1070413c3e1904e54091cf60effaa82 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
104 lines
3.6 KiB
C
104 lines
3.6 KiB
C
/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bl_common.h>
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#include <css_def.h>
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#include <debug.h>
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#include <mmio.h>
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#include <plat_arm.h>
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#include <string.h>
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#include "css_scp_bootloader.h"
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/* Weak definition may be overridden in specific CSS based platform */
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#if LOAD_IMAGE_V2
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#pragma weak plat_arm_bl2_handle_scp_bl2
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#else
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#pragma weak bl2_plat_handle_scp_bl2
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#endif
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/*******************************************************************************
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* Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol.
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* Return 0 on success, -1 otherwise.
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******************************************************************************/
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#if LOAD_IMAGE_V2
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int plat_arm_bl2_handle_scp_bl2(image_info_t *scp_bl2_image_info)
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#else
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int bl2_plat_handle_scp_bl2(image_info_t *scp_bl2_image_info)
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#endif
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{
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int ret;
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INFO("BL2: Initiating SCP_BL2 transfer to SCP\n");
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ret = scp_bootloader_transfer((void *)scp_bl2_image_info->image_base,
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scp_bl2_image_info->image_size);
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if (ret == 0)
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INFO("BL2: SCP_BL2 transferred to SCP\n");
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else
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ERROR("BL2: SCP_BL2 transfer failure\n");
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return ret;
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}
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#ifdef EL3_PAYLOAD_BASE
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/*
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* We need to override some of the platform functions when booting an EL3
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* payload.
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*/
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static unsigned int scp_boot_config;
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void bl2_early_platform_setup(meminfo_t *mem_layout)
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{
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arm_bl2_early_platform_setup(mem_layout);
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/* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */
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scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR);
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VERBOSE("BL2: Saved SCP Boot config = 0x%x\n", scp_boot_config);
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}
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void bl2_platform_setup(void)
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{
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arm_bl2_platform_setup();
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/*
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* Before releasing the AP cores out of reset, the SCP writes some data
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* at the beginning of the Trusted SRAM. It is is overwritten before
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* reaching this function. We need to restore this data, as if the
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* target had just come out of reset. This implies:
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* - zeroing the first 128 bytes of Trusted SRAM;
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* - restoring the SCP boot configuration.
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*/
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VERBOSE("BL2: Restoring SCP reset data in Trusted SRAM\n");
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zero_normalmem((void *)ARM_TRUSTED_SRAM_BASE, 128);
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mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config);
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}
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#endif /* EL3_PAYLOAD_BASE */
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