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0eb275c9a2
synquacer has CCN-512 interconnect. So enable proper CCN driver initialization. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
44 lines
1.4 KiB
C
44 lines
1.4 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <ccn.h>
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#include <platform_def.h>
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static const unsigned char master_to_rn_id_map[] = {
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PLAT_SQ_CLUSTER_TO_CCN_ID_MAP
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};
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static const ccn_desc_t sq_ccn_desc = {
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.periphbase = PLAT_SQ_CCN_BASE,
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.num_masters = ARRAY_SIZE(master_to_rn_id_map),
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.master_to_rn_id_map = master_to_rn_id_map
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};
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/******************************************************************************
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* Helper function to initialize SQ CCN driver.
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*****************************************************************************/
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void plat_sq_interconnect_init(void)
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{
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ccn_init(&sq_ccn_desc);
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}
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/******************************************************************************
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* Helper function to place current master into coherency
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*****************************************************************************/
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void plat_sq_interconnect_enter_coherency(void)
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{
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ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
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}
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/******************************************************************************
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* Helper function to remove current master from coherency
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*****************************************************************************/
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void plat_sq_interconnect_exit_coherency(void)
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{
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ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
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}
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