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0ed3be6fc2
This patch introduces support to handle traps from lower ELs for IMPDEF system register accesses. The actual support is left to the platforms to implement. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I623d5c432b4ce4328b68f238c15b1c83df97c1e5
64 lines
2.1 KiB
C
64 lines
2.1 KiB
C
/*
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* Copyright (c) 2022, ARM Limited. All rights reserved.
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* Copyright (c) 2023, NVIDIA Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef TRAP_HANDLE_H
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#define TRAP_HANDLE_H
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#include <stdbool.h>
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#include <context.h>
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#define ISS_SYSREG_OPCODE_MASK 0x3ffc1eUL
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#define ISS_SYSREG_REG_MASK 0x0003e0UL
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#define ISS_SYSREG_REG_SHIFT 5U
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#define ISS_SYSREG_DIRECTION_MASK 0x000001UL
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#define ISS_SYSREG_OPCODE_RNDR 0x30c808U
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#define ISS_SYSREG_OPCODE_IMPDEF 0x303c00U
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#define ISS_SYSREG_OPCODE_RNDRRS 0x32c808U
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#define TRAP_RET_UNHANDLED -1
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#define TRAP_RET_REPEAT 0
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#define TRAP_RET_CONTINUE 1
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#ifndef __ASSEMBLER__
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static inline unsigned int get_sysreg_iss_rt(uint64_t esr)
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{
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return (esr & ISS_SYSREG_REG_MASK) >> ISS_SYSREG_REG_SHIFT;
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}
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static inline bool is_sysreg_iss_write(uint64_t esr)
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{
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return !(esr & ISS_SYSREG_DIRECTION_MASK);
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}
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/**
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* handle_sysreg_trap() - Handle AArch64 system register traps from lower ELs
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* @esr_el3: The content of ESR_EL3, containing the trap syndrome information
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* @ctx: Pointer to the lower EL context, containing saved registers
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*
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* Called by the exception handler when a synchronous trap identifies as a
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* system register trap (EC=0x18). ESR contains the encoding of the op[x] and
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* CRm/CRn fields, to identify the system register, and the target/source
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* GPR plus the direction (MRS/MSR). The lower EL's context can be altered
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* by the function, to inject back the result of the emulation.
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*
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* Return: indication how to proceed with the trap:
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* TRAP_RET_UNHANDLED(-1): trap is unhandled, trigger panic
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* TRAP_RET_REPEAT(0): trap was handled, return to the trapping instruction
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* (repeating it)
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* TRAP_RET_CONTINUE(1): trap was handled, return to the next instruction
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* (continuing after it)
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*/
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int handle_sysreg_trap(uint64_t esr_el3, cpu_context_t *ctx);
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/* Prototypes for system register emulation handlers provided by platforms. */
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int plat_handle_impdef_trap(uint64_t esr_el3, cpu_context_t *ctx);
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int plat_handle_rng_trap(uint64_t esr_el3, cpu_context_t *ctx);
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#endif /* __ASSEMBLER__ */
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#endif
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