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This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE. DDR firmware binary is loaded from FIP to SRAM1 which needs to be mapped. Only half of the SRAM1 will be allocated to TF-A. RISAB3 has to be configured to allow access to SRAM1. Add image ID and update maximum number on platform side also. Fill related descriptor information, add policy and update numbers. DDR_TYPE variable is used to identify binary file, and image is now added in the fiptool command line. The DDR PHY firmware is not in TF-A repository. It can be found at https://github.com/STMicroelectronics/stm32-ddr-phy-binary To ease the selection of the firmware path, STM32MP_DDR_FW_PATH is added to platform.mk file. Change-Id: I09ab0a5c63406055a7b5ccd16d65e443de47ca2f Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
157 lines
4.8 KiB
ReStructuredText
157 lines
4.8 KiB
ReStructuredText
STM32MP2
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========
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STM32MP2 is a microprocessor designed by STMicroelectronics
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based on Arm Cortex-A35.
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More information can be found on `STM32MP2 Series`_ page.
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For TF-A common configuration of STM32 MPUs, please check
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:ref:`STM32 MPUs` page.
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STM32MP2 Versions
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-----------------
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The STM32MP25 series is available in 4 different lines which are pin-to-pin compatible:
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- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD – H264 - 3D GPU – AI / NN - LVDS
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- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - H264 - 3D GPU – AI / NN - LVDS
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- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - LVDS
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- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet
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Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
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- A Basic + Cortex-A35 @ 1.2GHz
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- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz
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- D Basic + Cortex-A35 @ 1.5GHz
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- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz
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The `STM32MP2 part number codification`_ page gives more information about part numbers.
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Memory mapping
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--------------
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::
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0x00000000 +-----------------+
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| ... |
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0x0E000000 +-----------------+ \
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| BL31 | |
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+-----------------+ |
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| ... | |
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0x0E012000 +-----------------+ |
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| BL2 DTB | | Embedded SRAM
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0x0E016000 +-----------------+ |
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| BL2 | |
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0x0E040000 +-----------------+ /
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| ... |
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0x40000000 +-----------------+
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| | Devices
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0x80000000 +-----------------+ \
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| | |
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| | | Non-secure RAM (DDR)
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0xFFFFFFFF +-----------------+ /
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Build Instructions
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------------------
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STM32MP2x specific flags
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~~~~~~~~~~~~~~~~~~~~~~~~
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Dedicated STM32MP2 build flags:
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- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP.
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| Default: 1
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- | ``STM32MP25``: to select STM32MP25 variant configuration.
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| Default: 1
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To compile the correct DDR driver, one flag must be set among:
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- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT.
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| Default: 0
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- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT.
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| Default: 0
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- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT.
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| Default: 0
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Boot with FIP
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~~~~~~~~~~~~~
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You need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) and retrieve
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DDR PHY firmware before building FIP binary.
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U-Boot
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______
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.. code:: bash
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cd <u-boot_directory>
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make stm32mp25_defconfig
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make DEVICE_TREE=stm32mp257f-ev1 all
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OP-TEE
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______
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.. code:: bash
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cd <optee_directory>
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make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi-
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ARCH=arm PLATFORM=stm32mp2 \
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CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts
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DDR PHY firmware
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________________
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DDR PHY firmware files may not be delivered inside TF-A repository, especially
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if you build directly from trustedfirmware.org repository. It then needs to be
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retrieved from `STMicroelectronics DDR PHY github`_.
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You can either clone the repository to the default directory:
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.. code:: bash
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git clone https://github.com/STMicroelectronics/stm32-ddr-phy-binary.git drivers/st/ddr/phy/firmware/bin
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Or clone it somewhere else, and add ``STM32MP_DDR_FW_PATH=`` in your make command
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line when building FIP.
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TF-A BL2
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________
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To build TF-A BL2 with its STM32 header for SD-card boot:
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.. code:: bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
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STM32MP_DDR4_TYPE=1 SPD=opteed \
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DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1
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For other boot devices, you have to replace STM32MP_SDMMC in the previous command
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with the desired device flag.
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FIP
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___
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.. code:: bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \
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STM32MP_DDR4_TYPE=1 SPD=opteed \
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DTB_FILE_NAME=stm32mp257f-ev1.dtb \
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BL33=<u-boot_directory>/u-boot-nodtb.bin \
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BL33_CFG=<u-boot_directory>/u-boot.dtb \
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BL32=<optee_directory>/tee-header_v2.bin \
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BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin
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fip
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.. _STM32MP2 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html
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.. _STM32MP2 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP25_microprocessor#Part_number_codification
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.. _STMicroelectronics DDR PHY github: https://github.com/STMicroelectronics/stm32-ddr-phy-binary
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*Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved*
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