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Addition of documents for platforms based on NXP SoC LX2160A. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Change-Id: I39ac5a9eb0b668d26301a0a24a1e6bf87f245f02
210 lines
7.3 KiB
ReStructuredText
210 lines
7.3 KiB
ReStructuredText
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--------------
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NXP Platforms:
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--------------
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TRUSTED_BOARD_BOOT option can be enabled by specifying TRUSTED_BOARD_BOOT=1 on command line during make.
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Bare-Minimum Preparation to run TBBR on NXP Platforms:
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=======================================================
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- OTPMK(One Time Programable Key) needs to be burnt in fuses.
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-- It is the 256 bit key that stores a secret value used by the NXP SEC 4.0 IP in Trusted or Secure mode.
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Note: It is primarily for the purpose of decrypting additional secrets stored in system non-volatile memory.
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-- NXP CST tool gives an option to generate it.
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Use the below command from directory 'cst', with correct options.
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.. code:: shell
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./gen_otpmk_drbg
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- SRKH (Super Root Key Hash) needs to be burnt in fuses.
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-- It is the 256 bit hash of the list of the public keys of the SRK key pair.
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-- NXP CST tool gives an option to generate the RSA key pair and its hash.
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Use the below command from directory 'cst', with correct options.
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.. code:: shell
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./gen_keys
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Refer fuse frovisioning readme 'nxp-ls-fuse-prov.rst' for steps to blow these keys.
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Two options are provided for TRUSTED_BOARD_BOOT:
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================================================
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-------------------------------------------------------------------------
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Option 1: CoT using X 509 certificates
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-------------------------------------------------------------------------
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- This CoT is as provided by ARM.
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- To use this option user needs to specify mbedtld dir path in MBEDTLS_DIR.
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- To generate CSF header, path of CST repository needs to be specified as CST_DIR
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- CSF header is embedded to each of the BL2 image.
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- GENERATE_COT=1 adds the tool 'cert_create' to the build environment to generate:
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-- X509 Certificates as (.crt) files.
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-- X509 Pem key file as (.pem) files.
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- SAVE_KEYS=1 saves the keys and certificates, if GENERATE_COT=1.
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-- For this to work, file name for cert and keys are provided as part of compilation or build command.
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--- default file names will be used, incase not provided as part compilation or build command.
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--- default folder 'BUILD_PLAT' will be used to store them.
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- ROTPK for x.509 certificates is generated and embedded in bl2.bin and
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verified as part of CoT by Boot ROM during secure boot.
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- Compilation steps:
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All Images
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.. code:: shell
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make PLAT=$PLAT TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=$MBEDTLS_PATH CST_DIR=$CST_DIR_PATH \
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BOOT_MODE=<platform_supported_boot_mode> \
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RCW=$RCW_BIN \
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BL32=$TEE_BIN SPD=opteed\
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BL33=$UBOOT_SECURE_BIN \
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pbl \
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fip
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Additional FIP_DDR Image (For NXP platforms like lx2160a)
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.. code:: shell
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make PLAT=$PLAT TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=$MBEDTLS_PATH fip_ddr
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Note: make target 'fip_ddr' should never be combine with other make target 'fip', 'pbl' & 'bl2'.
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-------------------------------------------------------------------------
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Option 2: CoT using NXP CSF headers.
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-------------------------------------------------------------------------
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- This option is automatically selected when TRUSTED_BOARD_BOOT is set but MBEDTLS_DIR path is not specified.
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- CSF header is embedded to each of the BL31, BL32 and BL33 image.
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- To generate CSF header, path of CST repository needs to be specified as CST_DIR
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- Default input files for CSF header generation is added in this repo.
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- Default input file requires user to generate RSA key pair named
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-- srk.pri, and
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-- srk.pub, and add them in ATF repo.
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-- These keys can be generated using gen_keys tool of CST.
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- To change the input file , user can use the options BL33_INPUT_FILE, BL32_INPUT_FILE, BL31_INPUT_FILE
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- There are 2 paths in secure boot flow :
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-- Development Mode (sb_en in RCW = 1, SFP->OSPR, ITS = 0)
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--- In this flow , even on ROTPK comparison failure, flow would continue.
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--- However SNVS is transitioned to non-secure state
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-- Production mode (SFP->OSPR, ITS = 1)
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--- Any failure is fatal failure
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- Compilation steps:
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All Images
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.. code:: shell
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make PLAT=$PLAT TRUSTED_BOARD_BOOT=1 CST_DIR=$CST_DIR_PATH \
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BOOT_MODE=<platform_supported_boot_mode> \
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RCW=$RCW_BIN \
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BL32=$TEE_BIN SPD=opteed\
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BL33=$UBOOT_SECURE_BIN \
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pbl \
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fip
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Additional FIP_DDR Image (For NXP platforms like lx2160a)
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.. code:: shell
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make PLAT=$PLAT TRUSTED_BOARD_BOOT=1 CST_DIR=$CST_DIR_PATH fip_ddr
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- Compilation Steps with build option for generic image processing filters to prepend CSF header:
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-- Generic image processing filters to prepend CSF header
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BL32_INPUT_FILE = < file name>
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BL33_INPUT_FILE = <file name>
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.. code:: shell
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make PLAT=$PLAT TRUSTED_BOARD_BOOT=1 CST_DIR=$CST_DIR_PATH \
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BOOT_MODE=<platform_supported_boot_mode> \
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RCW=$RCW_BIN \
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BL32=$TEE_BIN SPD=opteed\
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BL33=$UBOOT_SECURE_BIN \
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BL33_INPUT_FILE = <ip file> \
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BL32_INPUT_FILE = <ip_file> \
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BL31_INPUT_FILE = <ip file> \
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pbl \
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fip
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Deploy ATF Images
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=================
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Same steps as mentioned in the readme "nxp-layerscape.rst".
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Verification to check if Secure state is achieved:
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==================================================
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+---+----------------+-----------------+------------------------+----------------------------------+-------------------------------+
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| | Platform | SNVS_HPSR_REG | SYS_SECURE_BIT(=value) | SYSTEM_SECURE_CONFIG_BIT(=value) | SSM_STATE |
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+===+================+=================+========================+==================================+===============================+
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| 1.| lx2160ardb or | 0x01E90014 | 15 | 14-12 | 11-8 |
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| | lx2160aqds or | | ( = 1, BootROM Booted) | ( = 010 means Intent to Secure, | (=1111 means secure boot) |
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| | lx2162aqds | | | ( = 000 Unsecure) | (=1011 means Non-secure Boot) |
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+---+----------------+-----------------+------------------------+----------------------------------+-------------------------------+
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- Production mode (SFP->OSPR, ITS = 1)
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-- Linux prompt will successfully come. if the TBBR is successful.
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--- Else, Linux boot will be successful.
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-- For secure-boot status, read SNVS Register $SNVS_HPSR_REG from u-boot prompt:
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.. code:: shell
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md $SNVS_HPSR_REG
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Command Output:
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1e90014: 8000AF00
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In case it is read as 00000000, then read this register using jtag (in development mode only through CW tap).
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+0 +4 +8 +C
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[0x01E90014] 8000AF00
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- Development Mode (sb_en in RCW = 1, SFP->OSPR, ITS = 0)
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-- Refer the SoC specific table to read the register to interpret whether the secure boot is achieved or not.
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-- Using JTAG (in development environment only, using CW tap):
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--- For secure-boot status, read SNVS Register $SNVS_HPSR_REG
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.. code:: shell
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ccs::display_regs 86 0x01E90014 4 0 1
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Command Output:
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Using the SAP chain position number 86, following is the output.
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+0 +4 +8 +C
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[0x01E90014] 8000AF00
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Note: Chain position number will vary from one SoC to other SoC.
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- Interpretation of the value:
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-- 0xA indicates BootROM booted, with intent to secure.
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-- 0xF = secure boot, as SSM_STATE.
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