mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-13 16:14:20 +00:00
c540769349
The Arm FVP documentation has grown organically over the years. As a
result, it has become a big document, which can be difficult to digest.
Also, the organization of some of the sections does not make sense. In
particular, all "Running on the ... FVP" sections live under a section
named "Booting a preloaded kernel image (Base FVP)". To illustrate this,
here is the current table of contents:
Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Obtaining the Flattened Device Treesp
Running on the Foundation FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL1 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL31 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to SP_MIN entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL31 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to SP_MIN entrypoint
This patch breaks down this document in sub-documents, which are now
included from the index file. The table of contents (ToC) reflects the
new documents hierarchy. The depth of the ToC has been reduced to
simplify the index page. Here is what it looks like now:
Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Running on the Foundation FVP
Running on the AEMv8 Base FVP
Running on the Cortex-A57-A53 Base FVP
Running on the Cortex-A32 Base FVP (AArch32)
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Apart from moving information around in separate files, this patch also
makes the following minor changes to the contents:
- Add a brief introduction about FVPs in the index page.
- Change some of the titles names for conciseness.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Icb650e0ec2c7a86ccd6e7eea4e16a84c41442c96
52 lines
2.4 KiB
ReStructuredText
52 lines
2.4 KiB
ReStructuredText
Running on the Cortex-A57-A53 Base FVP
|
|
======================================
|
|
|
|
With reset to BL1 entrypoint
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
|
|
The following ``FVP_Base_Cortex-A57x4-A53x4`` model parameters should be used to
|
|
boot Linux with 8 CPUs using the AArch64 build of TF-A.
|
|
|
|
.. code:: shell
|
|
|
|
<path-to>/FVP_Base_Cortex-A57x4-A53x4 \
|
|
-C pctl.startup=0.0.0.0 \
|
|
-C bp.secure_memory=1 \
|
|
-C bp.tzc_400.diagnostics=1 \
|
|
-C cache_state_modelled=1 \
|
|
-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
|
|
-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
|
|
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
|
|
--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
|
|
|
|
With reset to BL31 entrypoint
|
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
|
|
The following ``FVP_Base_Cortex-A57x4-A53x4`` model parameters should be used to
|
|
boot Linux with 8 CPUs using the AArch64 build of TF-A.
|
|
|
|
.. code:: shell
|
|
|
|
<path-to>/FVP_Base_Cortex-A57x4-A53x4 \
|
|
-C pctl.startup=0.0.0.0 \
|
|
-C bp.secure_memory=1 \
|
|
-C bp.tzc_400.diagnostics=1 \
|
|
-C cache_state_modelled=1 \
|
|
-C cluster0.cpu0.RVBARADDR=0x04010000 \
|
|
-C cluster0.cpu1.RVBARADDR=0x04010000 \
|
|
-C cluster0.cpu2.RVBARADDR=0x04010000 \
|
|
-C cluster0.cpu3.RVBARADDR=0x04010000 \
|
|
-C cluster1.cpu0.RVBARADDR=0x04010000 \
|
|
-C cluster1.cpu1.RVBARADDR=0x04010000 \
|
|
-C cluster1.cpu2.RVBARADDR=0x04010000 \
|
|
-C cluster1.cpu3.RVBARADDR=0x04010000 \
|
|
--data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04010000 \
|
|
--data cluster0.cpu0="<path-to>/<bl32-binary>"@0xff000000 \
|
|
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
|
|
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
|
|
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
|
|
--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
|
|
|
|
--------------
|
|
|
|
*Copyright (c) 2019-2024, Arm Limited. All rights reserved.*
|