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This patch add supports for the new API added for BL2 at EL3 for FVP. We don't have a non-TF Boot ROM for FVP, but this option can be tested setting specific parameters in the model. The bl2 image is loaded directly in memory instead of being loaded by a non-TF Boot ROM and the reset address is changed: --data cluster0.cpu0=bl2.bin@0x4001000 -C cluster0.cpu0.RVBAR=0x4001000 These parameters mean that in the cold boot path the processor will jump to BL2 again. For this reason, BL2 is loaded in dram in this case, to avoid other images reclaiming BL2 memory. Change-Id: Ieb2ff8535a9e67ccebcd8c2212cad366e7776422 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
230 lines
6.8 KiB
Makefile
230 lines
6.8 KiB
Makefile
#
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# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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ifeq (${ARCH}, aarch64)
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# On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
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# DRAM (if available) or the TZC secured area of DRAM.
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# TZC secured DRAM is the default.
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ARM_TSP_RAM_LOCATION ?= dram
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ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
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else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
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else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
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ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
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else
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$(error "Unsupported ARM_TSP_RAM_LOCATION value")
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endif
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# Process flags
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# Process ARM_BL31_IN_DRAM flag
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ARM_BL31_IN_DRAM := 0
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$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
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$(eval $(call add_define,ARM_BL31_IN_DRAM))
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else
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
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endif
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$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
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# For the original power-state parameter format, the State-ID can be encoded
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# according to the recommended encoding or zero. This flag determines which
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# State-ID encoding to be parsed.
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ARM_RECOM_STATE_ID_ENC := 0
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# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
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# be set. Else throw a build error.
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ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
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ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
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$(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
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PSCI_EXTENDED_STATE_ID is set for ARM platforms)
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endif
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endif
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# Process ARM_RECOM_STATE_ID_ENC flag
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$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
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$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
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# Process ARM_DISABLE_TRUSTED_WDOG flag
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# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
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ARM_DISABLE_TRUSTED_WDOG := 0
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ifeq (${SPIN_ON_BL1_EXIT}, 1)
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ARM_DISABLE_TRUSTED_WDOG := 1
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endif
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$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
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$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
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# Process ARM_CONFIG_CNTACR
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ARM_CONFIG_CNTACR := 1
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$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
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$(eval $(call add_define,ARM_CONFIG_CNTACR))
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# Process ARM_BL31_IN_DRAM flag
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ARM_BL31_IN_DRAM := 0
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$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
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$(eval $(call add_define,ARM_BL31_IN_DRAM))
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# Process ARM_PLAT_MT flag
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ARM_PLAT_MT := 0
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$(eval $(call assert_boolean,ARM_PLAT_MT))
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$(eval $(call add_define,ARM_PLAT_MT))
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# Use translation tables library v2 by default
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ARM_XLAT_TABLES_LIB_V1 := 0
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$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
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$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
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# Use an implementation of SHA-256 with a smaller memory footprint but reduced
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# speed.
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$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
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# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
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# in the FIP if the platform requires.
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ifneq ($(BL32_EXTRA1),)
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$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
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endif
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ifneq ($(BL32_EXTRA2),)
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$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
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endif
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# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
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ENABLE_PSCI_STAT := 1
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ENABLE_PMF := 1
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# On ARM platforms, separate the code and read-only data sections to allow
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# mapping the former as executable and the latter as execute-never.
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SEPARATE_CODE_AND_RODATA := 1
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# Enable new version of image loading on ARM platforms
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LOAD_IMAGE_V2 := 1
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# Use generic OID definition (tbbr_oid.h)
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USE_TBBR_DEFS := 1
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# Disable ARM Cryptocell by default
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ARM_CRYPTOCELL_INTEG := 0
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$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
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$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
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PLAT_INCLUDES += -Iinclude/common/tbbr \
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-Iinclude/plat/arm/common
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ifeq (${ARCH}, aarch64)
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PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
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endif
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PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
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plat/arm/common/arm_common.c
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ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
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PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
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lib/xlat_tables/${ARCH}/xlat_tables.c
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else
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
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endif
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BL1_SOURCES += drivers/arm/sp805/sp805.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl1_setup.c \
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plat/arm/common/arm_io_storage.c
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ifdef EL3_PAYLOAD_BASE
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# Need the arm_program_trusted_mailbox() function to release secondary CPUs from
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# their holding pen
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BL1_SOURCES += plat/arm/common/arm_pm.c
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endif
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BL2_SOURCES += drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl2_setup.c \
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plat/arm/common/arm_io_storage.c
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ifeq (${BL2_AT_EL3},1)
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BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
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endif
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ifeq (${LOAD_IMAGE_V2},1)
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# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
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# the AArch32 descriptors.
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ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
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BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
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else
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BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
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endif
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BL2_SOURCES += plat/arm/common/arm_image_load.c \
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common/desc_image_load.c
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ifeq (${SPD},opteed)
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BL2_SOURCES += lib/optee/optee_utils.c
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endif
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endif
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BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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plat/arm/common/arm_bl2u_setup.c
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BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
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plat/arm/common/arm_pm.c \
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plat/arm/common/arm_topology.c \
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plat/arm/common/execution_state_switch.c \
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plat/common/plat_psci_common.c
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ifeq (${ENABLE_PMF}, 1)
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BL31_SOURCES += plat/arm/common/arm_sip_svc.c \
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lib/pmf/pmf_smc.c
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endif
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ifeq (${EL3_EXCEPTION_HANDLING},1)
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BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c
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endif
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ifeq (${SDEI_SUPPORT},1)
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BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
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endif
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ifneq (${TRUSTED_BOARD_BOOT},0)
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# Include common TBB sources
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AUTH_SOURCES := drivers/auth/auth_mod.c \
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drivers/auth/crypto_mod.c \
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drivers/auth/img_parser_mod.c \
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drivers/auth/tbbr/tbbr_cot.c \
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PLAT_INCLUDES += -Iinclude/bl1/tbbr
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BL1_SOURCES += ${AUTH_SOURCES} \
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bl1/tbbr/tbbr_img_desc.c \
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plat/arm/common/arm_bl1_fwu.c \
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plat/common/tbbr/plat_tbbr.c
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BL2_SOURCES += ${AUTH_SOURCES} \
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plat/common/tbbr/plat_tbbr.c
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$(eval $(call FWU_FIP_ADD_IMG,NS_BL2U,--fwu))
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# We expect to locate the *.mk files under the directories specified below
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ifeq (${ARM_CRYPTOCELL_INTEG},0)
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CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
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else
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CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
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endif
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IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
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$(info Including ${CRYPTO_LIB_MK})
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include ${CRYPTO_LIB_MK}
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$(info Including ${IMG_PARSER_LIB_MK})
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include ${IMG_PARSER_LIB_MK}
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endif
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