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https://github.com/ARM-software/arm-trusted-firmware.git
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b1d27b484f
This patch enables BL2 to execute at the highest exception level without any dependancy on TF BL1. This enables platforms which already have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL stages without need for BL1. This is not currently possible because BL2 executes at S-EL1 and cannot jump straight to EL3. Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
84 lines
2 KiB
ArmAsm
84 lines
2 KiB
ArmAsm
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <bl_common.h>
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#include <el3_common_macros.S>
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.globl bl2_entrypoint
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.globl bl2_run_next_image
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func bl2_entrypoint
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/* Save arguments x0-x3 from previous Boot loader */
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mov r9, r0
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mov r10, r1
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mov r11, r2
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mov r12, r3
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el3_entrypoint_common \
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_init_sctlr=1 \
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_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
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_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
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_init_memory=1 \
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_init_c_runtime=1 \
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_exception_vectors=bl2_vector_table
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/*
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* Restore parameters of boot rom
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*/
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mov r0, r9
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mov r1, r10
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mov r2, r11
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mov r3, r12
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bl bl2_el3_early_platform_setup
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bl bl2_el3_plat_arch_setup
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/* ---------------------------------------------
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* Jump to main function.
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* ---------------------------------------------
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*/
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bl bl2_main
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/* ---------------------------------------------
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* Should never reach this point.
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* ---------------------------------------------
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*/
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no_ret plat_panic_handler
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endfunc bl2_entrypoint
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func bl2_run_next_image
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mov r8,r0
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/*
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* MMU needs to be disabled because both BL2 and BL32 execute
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* in PL1, and therefore share the same address space.
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* BL32 will initialize the address space according to its
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* own requirement.
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*/
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bl disable_mmu_icache_secure
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stcopr r0, TLBIALL
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dsb sy
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isb
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mov r0, r8
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bl bl2_el3_plat_prepare_exit
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/*
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* Extract PC and SPSR based on struct `entry_point_info_t`
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* and load it in LR and SPSR registers respectively.
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*/
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ldr lr, [r8, #ENTRY_POINT_INFO_PC_OFFSET]
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ldr r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4)]
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msr spsr, r1
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add r8, r8, #ENTRY_POINT_INFO_ARGS_OFFSET
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ldm r8, {r0, r1, r2, r3}
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eret
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endfunc bl2_run_next_image
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