Masahisa Kojima 0922e481e5 xlat_tables_v2: add base table section name parameter for spm_mm ... Core spm_mm code expects the translation tables are located in the inner & outer WBWA & shareable memory. REGISTER_XLAT_CONTEXT2 macro is used to specify the translation table section in spm_mm. In the commit 363830df1c (xlat_tables_v2: merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE}), REGISTER_XLAT_CONTEXT2 macro explicitly specifies the base xlat table goes into .bss by default. This change affects the existing SynQuacer spm_mm implementation. plat/socionext/synquacer/include/plat.ld.S linker script intends to locate ".bss.sp_base_xlat_table" into "sp_xlat_table" section, but this implementation is no longer available. This patch adds the base table section name parameter for REGISTER_XLAT_CONTEXT2 so that platform can specify the inner & outer WBWA & shareable memory for spm_mm base xlat table. If PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME is not defined, base xlat table goes into .bss by default, the result is same as before. Change-Id: Ie0e1a235e5bd4288dc376f582d6c44c5df6d31b2 Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>		2020-06-02 14:53:06 +09:00
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aarch32	lib/xlat_tables: Add support for ARMv8.4-TTST	2019-01-30 11:17:38 +00:00
aarch64	lib/xlat_tables: Add support for ARMv8.4-TTST	2019-01-30 11:17:38 +00:00
xlat_mmu_helpers.h	xlat_tables_v2: add enable_mmu()	2020-03-31 11:51:56 +09:00
xlat_tables.h	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
xlat_tables_arch.h	Switch AARCH32/AARCH64 to __aarch64__	2019-08-01 13:45:03 -07:00
xlat_tables_compat.h	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
xlat_tables_defs.h	Switch AARCH32/AARCH64 to __aarch64__	2019-08-01 13:45:03 -07:00
xlat_tables_v2.h	xlat_tables_v2: add base table section name parameter for spm_mm	2020-06-02 14:53:06 +09:00
xlat_tables_v2_helpers.h	xlat_tables_v2: use ARRAY_SIZE in REGISTER_XLAT_CONTEXT_FULL_SPEC	2020-03-11 11:31:46 +09:00