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e8ffe79d06
Add IPI mailbox service to manage Xilinx ZynqMP IPI(Inter Processors Interrupt) access. Signed-off-by: Wendy Liang <jliang@xilinx.com>
39 lines
1.1 KiB
C
39 lines
1.1 KiB
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* ZynqMP IPI mailbox doorbell service enums and defines */
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#ifndef _IPI_MAILBOX_SVC_H_
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#define _IPI_MAILBOX_SVC_H_
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#include <stdint.h>
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/*********************************************************************
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* Enum definitions
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********************************************************************/
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/* IPI SMC function numbers enum definition */
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enum ipi_api_id {
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/* IPI mailbox operations functions: */
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IPI_MAILBOX_OPEN = 0x1000,
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IPI_MAILBOX_RELEASE,
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IPI_MAILBOX_STATUS_ENQUIRY,
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IPI_MAILBOX_NOTIFY,
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IPI_MAILBOX_ACK,
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IPI_MAILBOX_ENABLE_IRQ,
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IPI_MAILBOX_DISABLE_IRQ
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};
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/*********************************************************************
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* IPI mailbox service APIs declarations
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********************************************************************/
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/* IPI SMC handler */
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uint64_t ipi_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2,
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uint64_t x3, uint64_t x4, void *cookie, void *handle,
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uint64_t flags);
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#endif /* _IPI_MAILBOX_SVC_H_ */
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