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Okash Khawaja 04c7303b9c feat(cpus): make cache ops conditional
When a core is in debug recovery mode its caches are not invalidated
upon reset, so the L1 and L2 cache contents from before reset are
observable after reset. Similarly, debug recovery mode of DynamIQ
cluster ensures that contents of the shared L3 cache are also not
invalidated upon transition to On mode.

Booting cores in debug recovery mode means booting with caches disabled
and preserving the caches until a point where software can dump the
caches and retrieve their contents. TF-A however unconditionally cleans
and invalidates caches at multiple points during boot. This can lead to
memory corruption as well as loss of cache contents to be used for
debugging.

This patch fixes this by calling a platform hook before performing CMOs
in helper routines in cache_helpers.S. The platform hook plat_can_cmo is
an assembly routine which must not clobber x2 and x3, and avoid using
stack. The whole checking is conditional upon `CONDITIONAL_CMO` which
can be set at compile time.

Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: I172e999e4acd0f872c24056e647cc947ee54b193
2022-11-10 12:14:05 +00:00
.husky build(hooks): add commitlint hook 2021-04-19 14:06:25 +01:00
bl1 style(linker_script): fix indentation 2022-10-20 21:49:52 -07:00
bl2 style(linker_script): fix indentation 2022-10-20 21:49:52 -07:00
bl2u feat(debug): add helpers for aborts on AARCH32 2022-10-03 14:42:40 +02:00
bl31 feat: pass SMCCCv1.3 SVE hint bit to dispatchers 2022-11-08 09:28:36 +01:00
bl32 feat(debug): add helpers for aborts on AARCH32 2022-10-03 14:42:40 +02:00
common Merge "fix: backtrace stack unwind misses lr adjustment" into integration 2022-10-12 11:32:08 +02:00
docs feat(cpus): make cache ops conditional 2022-11-10 12:14:05 +00:00
drivers Merge "fix(gicv3/multichip): fix overflow caused by left shift" into integration 2022-10-26 09:45:24 +02:00
fdts Merge "fix(stm32mp13-fdts): correct PLL nodes name" into integration 2022-10-24 21:41:31 +02:00
include Merge "refactor(trng): cleanup the existing TRNG support" into integration 2022-11-09 17:30:17 +01:00
lib feat(cpus): make cache ops conditional 2022-11-10 12:14:05 +00:00
licenses docs(license): rectify arm-gic.h license 2021-04-26 12:36:00 +01:00
make_helpers feat(cpus): make cache ops conditional 2022-11-10 12:14:05 +00:00
plat fix(versal-net): add default values for silicon 2022-11-09 15:11:30 +05:30
services Merge "refactor(trng): cleanup the existing TRNG support" into integration 2022-11-09 17:30:17 +01:00
tools fix(sptool): operators "is/is not" in sp_mk_gen.py 2022-10-07 10:06:08 +01:00
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch 2019-07-12 11:06:24 +01:00
.commitlintrc.js build(commitlint): make the scope optional 2022-05-03 11:06:50 +02:00
.cz.json refactor(hooks): replace cz-conventional-changelog with cz-commitlint 2022-01-24 12:55:00 +00:00
.editorconfig .editorconfig: set max line length to 100 2020-12-03 15:39:23 +00:00
.gitignore feat(sptool): delete c version of the sptool 2022-05-04 15:37:47 +01:00
.gitreview Specify integration as the default branch for git-review 2020-04-02 07:57:17 +00:00
.nvmrc build(npm): add NVM version file 2022-10-10 13:24:22 +01:00
.versionrc.js docs(changelog): fix broken version bumping 2022-01-24 12:55:34 +00:00
changelog.yaml Merge "refactor(trng): cleanup the existing TRNG support" into integration 2022-11-09 17:30:17 +01:00
dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
Makefile feat(cpus): make cache ops conditional 2022-11-10 12:14:05 +00:00
package-lock.json build(npm): update locked Node.js dependencies 2022-10-10 13:29:59 +01:00
package.json docs(changelog): changelog for v2.7 release 2022-06-01 15:19:37 +01:00
readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

Trusted Firmware-A
==================

Trusted Firmware-A (TF-A) is a reference implementation of secure world software
for `Arm A-Profile architectures`_ (Armv8-A and Armv7-A), including an Exception
Level 3 (EL3) `Secure Monitor`_. It provides a suitable starting point for
productization of secure world boot and runtime firmware, in either the AArch32
or AArch64 execution states.

TF-A implements Arm interface standards, including:

-  `Power State Coordination Interface (PSCI)`_
-  `Trusted Board Boot Requirements CLIENT (TBBR-CLIENT)`_
-  `SMC Calling Convention`_
-  `System Control and Management Interface (SCMI)`_
-  `Software Delegated Exception Interface (SDEI)`_

The code is designed to be portable and reusable across hardware platforms and
software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A
with reference implementations of Arm standards to benefit developers working
with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration
testing, on any secure world code derived from TF-A.

More Info and Documentation
---------------------------

To find out more about Trusted Firmware-A, please `view the full documentation`_
that is available through `trustedfirmware.org`_.

--------------

*Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.*

.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile
.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php
.. _Power State Coordination Interface (PSCI): PSCI_
.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT): https://developer.arm.com/docs/den0006/latest/trusted-board-boot-requirements-client-tbbr-client-armv8-a
.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
.. _System Control and Management Interface (SCMI): SCMI_
.. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
.. _Software Delegated Exception Interface (SDEI): SDEI_
.. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
.. _Arm A-Profile architectures: https://developer.arm.com/architectures/cpu-architecture/a-profile
.. _view the full documentation: https://www.trustedfirmware.org/docs/tf-a
.. _trustedfirmware.org: http://www.trustedfirmware.org