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010d6ae338
px30 is a Quad-core soc and Cortex-a53 inside. This patch supports the following functions: 1. basic platform setup 2. power up/off cpus 3. suspend/resume cpus 4. suspend/resume system 5. reset system 6. power off system Change-Id: I73d55aa978096c078242be921abe0ddca9e8f67e Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
38 lines
767 B
ArmAsm
38 lines
767 B
ArmAsm
/*
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* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __ROCKCHIP_PLAT_LD_S__
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#define __ROCKCHIP_PLAT_LD_S__
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MEMORY {
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PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
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}
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SECTIONS
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{
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. = PMUSRAM_BASE;
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/*
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* pmu_cpuson_entrypoint request address
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* align 64K when resume, so put it in the
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* start of pmusram
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*/
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.pmusram : {
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ASSERT(. == ALIGN(64 * 1024),
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".pmusram.entry request 64K aligned.");
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KEEP(*(.pmusram.entry))
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__bl31_pmusram_text_start = .;
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*(.pmusram.text)
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*(.pmusram.rodata)
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__bl31_pmusram_text_end = .;
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__bl31_pmusram_data_start = .;
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*(.pmusram.data)
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__bl31_pmusram_data_end = .;
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} >PMUSRAM
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}
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#endif /* __ROCKCHIP_PLAT_LD_S__ */
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