These are empty functions with no logic right now. Code
will be added in subsequent commits.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Implement ioctl APIs which uses MMIO operations
to control RPU operations. Below IOCTLs are supported
in this patch:
* Get RPU operation mode
* Set RPU operation mode
* Configure RPU boot address (OCM/TCM)
* Configure TCM combined mode
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Add wrappers for pin control APIs. Actual implementation of
these APIs would be done in subsequent changes.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Synchronize argument order between function definition and declaration
of pm_fpga_load.
FixesARM-software/tf-issues#514
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
The callback IRQ is delivered to the NS OS. Provide an interface to
allow the NS OS to obtain the callback data from the secure HW.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Use the PMUFW get_chipid call to obtain IDCODE and version register.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide
the Access to the xilfpga library to load the bitstream into zynqmp
PL region.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
