Commit graph

2 commits

Author SHA1 Message Date
Sieu Mun Tang
94a546acc4 feat(intel): pinmux and power manager config for Agilex5 platform
Read the hand-off data and configure the pinmux
select, IO control, IO delay and use FPGA switch.
Configure the power manager PSS SRAM power gate.

Change-Id: I2241018cbf2828182e8af84ddb214ce57e9f242a
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
2024-10-24 15:23:43 +08:00
Jit Loon Lim
fcbb5cf7ea feat(intel): pinmux, peripheral and Handoff support for Agilex5 SoC FPGA
This patch is used to enable pinmux, peripheral and handoff support
for Agilex5 SoC FPGA.
	1. Initial handoff bring up
	2. Added power manager handoff implementation
	3. Added sdram handoff implementation
	4. Updated product name -> Agilex5
	5. Updated register address based on y22ww52.2 RTL

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I4b0176bc86c57823127bf41086306015d702577d
2023-07-05 09:08:13 +08:00