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Author SHA1 Message Date
Jit Loon Lim
18adb4efa4 feat(intel): memory controller support for Agilex5 SoC FPGA 
This patch is used to enable memory controller support
for Agilex5 SoC FPGA.
	1. Added memory controller support.
	2. Updated product name -> Agilex5

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I8381b82eeed939b970a7410a6181a514f2c90caa
 2023-07-05 09:08:24 +08:00