Commit graph

3 commits

Author SHA1 Message Date
Toshiyuki Ogasahara
e9afde1a2e fix(rcar3): change RAM protection configurations
Change RAM protection control not to overwrite the images by DSMAC.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I038dc2bf90e721692d392ea4de5441647aa62029
---
Marek: - Move axi DRAM out and merge AXI_SPTCR15 setting into it
       - Set AXI_SPTCR1 from 0x0E000E0EU to 0x0E000000U to let
         TEE pick TFA DT
2023-12-13 22:12:15 +01:00
Toshiyuki Ogasahara
5460f82806 feat(plat/rcar3): modify LifeC register setting for R-Car D3
Modified SECGRP0COND6 and SECGRP1COND6 setting for R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I3f173ac44c11743965c013ef238748b0dc8cabab
2021-09-12 01:13:48 +02:00
Biju Das
499c2713f0 plat: renesas: Move to common
Move rcar plat code to common directory, so that the same
code can be re-used by both R-Car Gen3 and RZ/G2 platforms.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: I1001bea1a8a9232a03ddbf6931ca3c764ba1e181
2021-01-13 13:03:49 +00:00
Renamed from plat/renesas/rcar/bl2_secure_setting.c (Browse further)