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marvell: comphy: cp110: add support for USB comphy polarity invert

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The polarity inversion for USB was not tested due to lack of hw design
which requires it. Currently all supported boards doesn't require USB
phy polarity inversion, therefore COMPHY_POLARITY_NO_INVERT is set for
all boards. Enable the option for the ones that need it.

Change-Id: Ia5f2ee313a93962e94963e2dd8a759ef6d9da369
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
This commit is contained in:
Grzegorz Jaszczyk 2020-01-21 17:02:29 +01:00 • committed by Marcin Wojtas
parent 38f6daca7a
commit ff9cfdc0e2
5 changed files with 39 additions and 0 deletions
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15
drivers/marvell/comphy/phy-comphy-cp110.c
View file

@ -1922,6 +1922,7 @@ static int mvebu_cp110_comphy_usb3_power_on(uint64_t comphy_base,
{
uintptr_t hpipe_addr, comphy_addr, addr;
uint32_t mask, data;
uint8_t ap_nr, cp_nr, phy_polarity_invert;
int ret = 0;
debug_enter();
@ -1930,6 +1931,13 @@ static int mvebu_cp110_comphy_usb3_power_on(uint64_t comphy_base,
mvebu_cp110_comphy_set_pipe_selector(comphy_base, comphy_index,
comphy_mode);
mvebu_cp110_get_ap_and_cp_nr(&ap_nr, &cp_nr, comphy_base);
const struct usb_params *usb_static_values =
&usb_static_values_tab[ap_nr][cp_nr][comphy_index];
phy_polarity_invert = usb_static_values->polarity_invert;
hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
comphy_index);
comphy_addr = COMPHY_ADDR(comphy_base, comphy_index);
@ -2009,6 +2017,13 @@ static int mvebu_cp110_comphy_usb3_power_on(uint64_t comphy_base,
0x1 << HPIPE_TST_MODE_CTRL_MODE_MARGIN_OFFSET,
HPIPE_TST_MODE_CTRL_MODE_MARGIN_MASK);
/* The polarity inversion for USB was not tested due to lack of hw
* design which requires it. Support is added for customer needs.
*/
if (phy_polarity_invert)
mvebu_cp110_polarity_invert(hpipe_addr + HPIPE_SYNC_PATTERN_REG,
phy_polarity_invert);
/* Start analog parameters from ETP(HW) */
debug("stage: Analog parameters from ETP(HW)\n");
/* Set Pin DFE_PAT_DIS -> Bit[1]: PIN_DFE_PAT_DIS = 0x0 */

4
drivers/marvell/comphy/phy-comphy-cp110.h
View file

@ -81,6 +81,10 @@ struct sata_params {
_Bool valid;
};
struct usb_params {
uint8_t polarity_invert;
};
int mvebu_cp110_comphy_is_pll_locked(uint64_t comphy_base,
uint8_t comphy_index);
int mvebu_cp110_comphy_power_off(uint64_t comphy_base,

7
drivers/marvell/comphy/phy-default-porting-layer.h
View file

@ -49,4 +49,11 @@ static const struct sata_params
.valid = 0x1
},
};
static const struct usb_params
usb_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
[0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = {
.polarity_invert = COMPHY_POLARITY_NO_INVERT
},
};
#endif /* PHY_DEFAULT_PORTING_LAYER_H */

7
plat/marvell/armada/a8k/a80x0/board/phy-porting-layer.h
View file

@ -182,4 +182,11 @@ static const struct sata_params
},
},
};
static const struct usb_params
usb_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
[0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = {
.polarity_invert = COMPHY_POLARITY_NO_INVERT
},
};
#endif /* PHY_PORTING_LAYER_H */

6
plat/marvell/octeontx/otx2/t91/t9130/board/phy-porting-layer.h
View file

@ -136,4 +136,10 @@ SATA_PARAMS sata_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
},
};
static const struct usb_params
usb_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
[0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = {
.polarity_invert = COMPHY_POLARITY_NO_INVERT
},
};
#endif /* __PHY_PORTING_LAYER_H */