Merge "fix(tegra210): support legacy SMC_ID 0xC2FEFE00" into integration

This commit is contained in:
Varun Wadekar 2023-03-10 17:28:10 +01:00 committed by TrustedFirmware Code Review
commit ff65ac2440

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@ -1,6 +1,6 @@
/* /*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * Copyright (c) 2020-2023, NVIDIA Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -33,6 +33,7 @@
/******************************************************************************* /*******************************************************************************
* Tegra210 SiP SMCs * Tegra210 SiP SMCs
******************************************************************************/ ******************************************************************************/
#define TEGRA_SIP_PMC_COMMANDS_LEGACY U(0xC2FEFE00)
#define TEGRA_SIP_PMC_COMMANDS U(0xC2FFFE00) #define TEGRA_SIP_PMC_COMMANDS U(0xC2FFFE00)
/******************************************************************************* /*******************************************************************************
@ -54,7 +55,7 @@ int plat_sip_handler(uint32_t smc_fid,
if (!ns) if (!ns)
SMC_RET1(handle, SMC_UNK); SMC_RET1(handle, SMC_UNK);
if (smc_fid == TEGRA_SIP_PMC_COMMANDS) { if ((smc_fid == TEGRA_SIP_PMC_COMMANDS) || (smc_fid == TEGRA_SIP_PMC_COMMANDS_LEGACY)) {
/* check the address is within PMC range and is 4byte aligned */ /* check the address is within PMC range and is 4byte aligned */
if ((x2 >= TEGRA_PMC_SIZE) || (x2 & 0x3)) if ((x2 >= TEGRA_PMC_SIZE) || (x2 & 0x3))
return -EINVAL; return -EINVAL;