Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-19 02:54:24 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

fix(arm): move HW_CONFIG relocation into BL31

Browse source 
Refactor DT relocation logic from BL2 to BL31 for non-secure DRAM.
Previously, BL2 was responsible for copying the DT into SRAM and DRAM,
resulting in duplicate code in BL31 to cater for the `RESET_TO_BL31`
case. By moving the re-location logic to BL31, we simplify handling of
the non-secure DT and TL.

Change-Id: Id239f9410669afe4b223fa8d8bb093084a0e5e1b
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
This commit is contained in:
Harrison Mutai 2024-07-12 14:23:02 +00:00
parent 4dcbba98ce
commit fe94a21a68
4 changed files with 54 additions and 50 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
include/plat/arm/common/plat_arm.h
View file

@ -284,10 +284,7 @@ void arm_bl31_plat_arch_setup(void);
/* Firmware Handoff utility functions */
void arm_transfer_list_dyn_cfg_init(struct transfer_list_header *secure_tl);
void arm_transfer_list_populate_ep_info(bl_mem_params_node_t *next_param_node,
struct transfer_list_header *secure_tl,
struct transfer_list_header *ns_tl);
void arm_transfer_list_copy_hw_config(struct transfer_list_header *secure_tl,
struct transfer_list_header *ns_tl);
struct transfer_list_header *secure_tl);
/* TSP utility functions */
void arm_tsp_early_platform_setup(void);

15
plat/arm/common/arm_bl2_setup.c
View file

@ -162,16 +162,6 @@ void arm_bl2_platform_setup(void)
#if defined(PLAT_ARM_MEM_PROT_ADDR)
arm_nor_psci_do_static_mem_protect();
#endif
#if TRANSFER_LIST
ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE,
PLAT_ARM_FW_HANDOFF_SIZE);
if (ns_tl == NULL) {
ERROR("Non-secure transfer list initialisation failed!");
panic();
}
#endif
}
void bl2_platform_setup(void)
@ -326,7 +316,8 @@ int arm_bl2_plat_handle_post_image_load(unsigned int image_id)
#if TRANSFER_LIST
if (image_id == HW_CONFIG_ID) {
arm_transfer_list_copy_hw_config(secure_tl, ns_tl);
/* Refresh the now stale checksum following loading of HW_CONFIG into the TL. */
transfer_list_update_checksum(secure_tl);
}
#endif /* TRANSFER_LIST */
@ -340,5 +331,5 @@ void arm_bl2_setup_next_ep_info(bl_mem_params_node_t *next_param_node)
&next_param_node->ep_info);
assert(ep != NULL);
arm_transfer_list_populate_ep_info(next_param_node, secure_tl, ns_tl);
arm_transfer_list_populate_ep_info(next_param_node, secure_tl);
}

60
plat/arm/common/arm_bl31_setup.c
View file

@ -25,6 +25,8 @@
#include <platform_def.h>
static struct transfer_list_header *secure_tl __unused;
static struct transfer_list_header *ns_tl __unused;
/*
* Placeholder variables for copying the arguments that have been passed to
* BL31 from BL2.
@ -95,7 +97,12 @@ struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type)
assert(sec_state_is_valid(type));
if (type == NON_SECURE) {
#if TRANSFER_LIST && !RESET_TO_BL31
next_image_info = transfer_list_set_handoff_args(
ns_tl, &bl33_image_ep_info);
#else
next_image_info = &bl33_image_ep_info;
#endif
}
#if ENABLE_RME
else if (type == REALM) {
@ -142,8 +149,8 @@ void __init arm_bl31_early_platform_setup(u_register_t arg0, u_register_t arg1,
bl33_image_ep_info.args.arg0 =
FW_NS_HANDOFF_BASE + ARM_PRELOADED_DTB_OFFSET;
bl33_image_ep_info.args.arg1 = TRANSFER_LIST_SIGNATURE |
REGISTER_CONVENTION_VERSION_MASK;
bl33_image_ep_info.args.arg1 =
TRANSFER_LIST_HANDOFF_X1_VALUE(REGISTER_CONVENTION_VERSION);
bl33_image_ep_info.args.arg3 = FW_NS_HANDOFF_BASE;
#else
struct transfer_list_entry *te = NULL;
@ -357,6 +364,28 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
******************************************************************************/
void arm_bl31_platform_setup(void)
{
struct transfer_list_entry *te __unused;
#if TRANSFER_LIST && !RESET_TO_BL31
/* Initialise the non-secure world tl, BL31 may modify the HW_CONFIG so defer
* copying it until later.
*/
ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE,
PLAT_ARM_FW_HANDOFF_SIZE);
if (ns_tl == NULL) {
ERROR("Non-secure transfer list initialisation failed!");
panic();
}
#if !RESET_TO_BL2
te = transfer_list_find(secure_tl, TL_TAG_FDT);
assert(te != NULL);
fconf_populate("HW_CONFIG", (uintptr_t)transfer_list_entry_data(te));
#endif /* !(RESET_TO_BL2 && RESET_TO_BL31) */
#endif /* TRANSFER_LIST */
/* Initialize the GIC driver, cpu and distributor interfaces */
plat_arm_gic_driver_init();
plat_arm_gic_init();
@ -399,9 +428,26 @@ void arm_bl31_platform_setup(void)
******************************************************************************/
void arm_bl31_plat_runtime_setup(void)
{
struct transfer_list_entry *te __unused;
/* Initialize the runtime console */
arm_console_runtime_init();
#if TRANSFER_LIST && !RESET_TO_BL31
te = transfer_list_find(secure_tl, TL_TAG_FDT);
assert(te != NULL);
te = transfer_list_add(ns_tl, TL_TAG_FDT, te->data_size,
transfer_list_entry_data(te));
assert(te != NULL);
/*
* We assume BL31 has added all TE's required by BL33 at this stage, ensure
* that data is visible to all observers by performing a flush operation, so
* they can access the updated data even if caching is not enabled.
*/
flush_dcache_range((uintptr_t)ns_tl, ns_tl->size);
#endif /* TRANSFER_LIST && !(RESET_TO_BL2 || RESET_TO_BL31) */
#if RECLAIM_INIT_CODE
arm_free_init_memory();
#endif
@ -516,15 +562,5 @@ void __init arm_bl31_plat_arch_setup(void)
void __init bl31_plat_arch_setup(void)
{
struct transfer_list_entry *te __unused;
arm_bl31_plat_arch_setup();
#if TRANSFER_LIST && !(RESET_TO_BL2 || RESET_TO_BL31)
te = transfer_list_find(secure_tl, TL_TAG_FDT);
assert(te != NULL);
/* Populate HW_CONFIG device tree with the mapped address */
fconf_populate("HW_CONFIG", (uintptr_t)transfer_list_entry_data(te));
#endif
}

24
plat/arm/common/arm_transfer_list.c
View file

@ -30,8 +30,7 @@ void arm_transfer_list_dyn_cfg_init(struct transfer_list_header *secure_tl)
}
void arm_transfer_list_populate_ep_info(bl_mem_params_node_t *next_param_node,
struct transfer_list_header *secure_tl,
struct transfer_list_header *ns_tl)
struct transfer_list_header *secure_tl)
{
uint32_t next_exe_img_id;
entry_point_info_t *ep;
@ -53,10 +52,7 @@ void arm_transfer_list_populate_ep_info(bl_mem_params_node_t *next_param_node,
ep = transfer_list_entry_data(te);
if (next_exe_img_id == BL33_IMAGE_ID) {
ep = transfer_list_set_handoff_args(ns_tl, ep);
assert(ep != NULL);
} else if ((next_exe_img_id == BL32_IMAGE_ID) && SPMC_AT_EL3) {
if ((next_exe_img_id == BL32_IMAGE_ID) && SPMC_AT_EL3) {
/*
* Populate the BL32 image base, size and max limit in
* the entry point information, since there is no
@ -78,19 +74,3 @@ void arm_transfer_list_populate_ep_info(bl_mem_params_node_t *next_param_node,
flush_dcache_range((uintptr_t)secure_tl, secure_tl->size);
}
void arm_transfer_list_copy_hw_config(struct transfer_list_header *secure_tl,
struct transfer_list_header *ns_tl)
{
struct transfer_list_entry *te =
transfer_list_find(secure_tl, TL_TAG_FDT);
assert(te != NULL);
/* Refresh the now stale checksum following loading of HW_CONFIG into the TL. */
transfer_list_update_checksum(secure_tl);
/* Copy the hardware configuration to the non-secure TL. */
te = transfer_list_add(ns_tl, TL_TAG_FDT, te->data_size,
transfer_list_entry_data(te));
assert(te != NULL);
}