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feat(board/rdn2): add support for variant 1 of rd-n2 platform

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Add board support for RD-N2 Cfg1 variant of RD-N2 platform. It is a
variant of RD-N2 platform with a reduced interconnect mesh size (3x3)
and core count (8-cores). Its platform variant id is 1.

Change-Id: I34ad35c5a5c1e9b69a658fb92ed00e5bc5fe72f3
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
This commit is contained in:
Aditya Angadi 2021-03-20 12:15:04 +05:30
parent cfe1506ee8
commit fe5d5bbfe6
5 changed files with 29 additions and 4 deletions
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15
plat/arm/board/rdn2/include/platform_def.h
View file

@ -11,7 +11,12 @@
#include <sgi_soc_platform_def_v2.h>
#if (CSS_SGI_PLATFORM_VARIANT == 1)
#define PLAT_ARM_CLUSTER_COUNT U(8)
#else
#define PLAT_ARM_CLUSTER_COUNT U(16)
#endif
#define CSS_SGI_MAX_CPUS_PER_CLUSTER U(1)
#define CSS_SGI_MAX_PE_PER_CPU U(1)
@ -26,7 +31,12 @@
#define PLAT_ARM_TZC_FILTERS TZC_400_REGION_ATTR_FILTER_BIT(0)
#define TZC400_OFFSET UL(0x1000000)
#if (CSS_SGI_PLATFORM_VARIANT == 1)
#define TZC400_COUNT U(2)
#else
#define TZC400_COUNT U(8)
#endif
#define TZC400_BASE(n) (PLAT_ARM_TZC_BASE + \
(n * TZC400_OFFSET))
@ -60,6 +70,11 @@
/* GIC related constants */
#define PLAT_ARM_GICD_BASE UL(0x30000000)
#define PLAT_ARM_GICC_BASE UL(0x2C000000)
#if (CSS_SGI_PLATFORM_VARIANT == 1)
#define PLAT_ARM_GICR_BASE UL(0x30100000)
#else
#define PLAT_ARM_GICR_BASE UL(0x301C0000)
#endif
#endif /* PLATFORM_DEF_H */

8
plat/arm/board/rdn2/platform.mk
View file

@ -59,7 +59,9 @@ $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
override CTX_INCLUDE_AARCH32_REGS := 0
override ENABLE_AMU := 1
ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
$(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0, currently set to \
${CSS_SGI_PLATFORM_VARIANT}.")
RD_N2_VARIANTS := 0 1
ifneq ($(CSS_SGI_PLATFORM_VARIANT),\
$(filter $(CSS_SGI_PLATFORM_VARIANT),$(RD_N2_VARIANTS)))
$(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0 or 1, currently set \
to ${CSS_SGI_PLATFORM_VARIANT}.")
endif

4
plat/arm/board/rdn2/rdn2_topology.c
View file

@ -20,6 +20,7 @@ const unsigned char rd_n2_pd_tree_desc[] = {
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
#if (CSS_SGI_PLATFORM_VARIANT == 0)
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
@ -28,6 +29,7 @@ const unsigned char rd_n2_pd_tree_desc[] = {
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
#endif
};
/*******************************************************************************
@ -51,6 +53,7 @@ const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x5)),
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x6)),
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x7)),
#if (CSS_SGI_PLATFORM_VARIANT == 0)
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x8)),
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x9)),
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xA)),
@ -59,4 +62,5 @@ const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xD)),
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xE)),
(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xF)),
#endif
};

3
plat/arm/css/sgi/include/sgi_variant.h
View file

@ -20,6 +20,9 @@
/* SID Version values for RD-N2 */
#define RD_N2_SID_VER_PART_NUM 0x07B7
/* SID Version values for RD-N2 variants */
#define RD_N2_CFG1_SID_VER_PART_NUM 0x07B6
/* Structure containing SGI platform variant information */
typedef struct sgi_platform_info {
unsigned int platform_id; /* Part Number of the platform */

3
plat/arm/css/sgi/sgi_bl31_setup.c
View file

@ -75,7 +75,8 @@ scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id)
{
if (sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM ||
sgi_plat_info.platform_id == RD_V1_SID_VER_PART_NUM ||
sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM) {
sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM ||
sgi_plat_info.platform_id == RD_N2_CFG1_SID_VER_PART_NUM) {
if (channel_id >= ARRAY_SIZE(plat_rd_scmi_info))
panic();
return &plat_rd_scmi_info[channel_id];