fix(cpus): workaround for Cortex-X2 erratum 2742423

Cortex-X2 erratum 2742423 is a Cat B erratum that applies to all
revisions <= r2p1 and is still open.
The workaround is to set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest

Change-Id: I03897dc2a7f908937612c2b66ce7a043c1b7575d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
This commit is contained in:
Bipin Ravi 2023-10-17 09:11:19 -05:00 committed by laurenw-arm
parent d7bc2cb430
commit fe06e118ab
4 changed files with 19 additions and 2 deletions

View file

@ -733,6 +733,10 @@ For Cortex-X2, the following errata build flags are defined :
This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is
still open.
- ``ERRATA_X2_2742423``: This applies errata 2742423 workaround to Cortex-X2
CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
CPU and is still open.
- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2
CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
CPU and is still open.

View file

@ -118,6 +118,14 @@ workaround_reset_end cortex_x2, ERRATUM(2371105)
check_erratum_ls cortex_x2, ERRATUM(2371105), CPU_REV(2, 0)
workaround_reset_start cortex_x2, ERRATUM(2742423), ERRATA_X2_2742423
/* Set CPUACTLR5_EL1[56:55] to 2'b01 */
sysreg_bit_set CORTEX_X2_CPUACTLR5_EL1, BIT(55)
sysreg_bit_clear CORTEX_X2_CPUACTLR5_EL1, BIT(56)
workaround_reset_end cortex_x2, ERRATUM(2742423)
check_erratum_ls cortex_x2, ERRATUM(2742423), CPU_REV(2, 1)
workaround_reset_start cortex_x2, ERRATUM(2768515), ERRATA_X2_2768515
/* dsb before isb of power down sequence */
dsb sy

View file

@ -743,6 +743,10 @@ CPU_FLAG_LIST += ERRATA_X2_2371105
# and is still open.
CPU_FLAG_LIST += ERRATA_X2_2701952
# Flag to apply erratum 2742423 workaround during reset. This erratum applies
# to revisions r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is still open.
CPU_FLAG_LIST += ERRATA_X2_2742423
# Flag to apply erratum 2768515 workaround during power down. This erratum
# applies to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is
# still open.

View file

@ -380,8 +380,9 @@ struct em_cpu_list cpu_list[] = {
[8] = {2371105, 0x00, 0x20, ERRATA_X2_2371105},
[9] = {2701952, 0x00, 0x21, ERRATA_X2_2701952, \
ERRATA_NON_ARM_INTERCONNECT},
[10] = {2768515, 0x00, 0x21, ERRATA_X2_2768515},
[11 ... ERRATA_LIST_END] = UNDEF_ERRATA,
[10] = {2742423, 0x00, 0x21, ERRATA_X2_2742423},
[11] = {2768515, 0x00, 0x21, ERRATA_X2_2768515},
[12 ... ERRATA_LIST_END] = UNDEF_ERRATA,
}
},
#endif /* CORTEX_X2_H_INC */