From fcf906c90088227b51a526533e71f4c8cd879778 Mon Sep 17 00:00:00 2001 From: Boon Khai Ng Date: Mon, 23 Sep 2024 11:32:40 +0800 Subject: [PATCH] feat(intel): add support for query SDM config error and status Currently the FPGA reconfig status only return a single error status which make the debugging of FPGA reconfiguration hard. This patch is to expose the error status, major error code and minor error code, for the FPGA reconfig to upper layer app. Change-Id: I2fc68e30b45ff137f3e52f9569fdf2eaf2ca94ee Signed-off-by: Boon Khai Ng Signed-off-by: Sieu Mun Tang --- plat/intel/soc/common/include/socfpga_mailbox.h | 3 ++- plat/intel/soc/common/soc/socfpga_mailbox.c | 10 +++++++--- plat/intel/soc/common/socfpga_sip_svc.c | 16 ++++++++++------ 3 files changed, 19 insertions(+), 10 deletions(-) diff --git a/plat/intel/soc/common/include/socfpga_mailbox.h b/plat/intel/soc/common/include/socfpga_mailbox.h index dfa409f6e..e27af21e6 100644 --- a/plat/intel/soc/common/include/socfpga_mailbox.h +++ b/plat/intel/soc/common/include/socfpga_mailbox.h @@ -243,7 +243,8 @@ void mailbox_reset_cold(void); void mailbox_reset_warm(uint32_t reset_type); void mailbox_clear_response(void); -int intel_mailbox_get_config_status(uint32_t cmd, bool init_done); +int intel_mailbox_get_config_status(uint32_t cmd, bool init_done, + uint32_t *err_states); int intel_mailbox_is_fpga_not_ready(void); #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5 diff --git a/plat/intel/soc/common/soc/socfpga_mailbox.c b/plat/intel/soc/common/soc/socfpga_mailbox.c index 94895ba29..69f000803 100644 --- a/plat/intel/soc/common/soc/socfpga_mailbox.c +++ b/plat/intel/soc/common/soc/socfpga_mailbox.c @@ -638,7 +638,8 @@ int mailbox_send_fpga_config_comp(void) return MBOX_RET_OK; } -int intel_mailbox_get_config_status(uint32_t cmd, bool init_done) +int intel_mailbox_get_config_status(uint32_t cmd, bool init_done, + uint32_t *err_states) { int status; uint32_t res, response[6]; @@ -653,6 +654,9 @@ int intel_mailbox_get_config_status(uint32_t cmd, bool init_done) res = response[RECONFIG_STATUS_STATE]; + if (err_states != NULL) + *err_states = res; + if (res == MBOX_CFGSTAT_VAB_BS_PREAUTH) { return MBOX_CFGSTAT_STATE_CONFIG; } @@ -684,11 +688,11 @@ int intel_mailbox_get_config_status(uint32_t cmd, bool init_done) int intel_mailbox_is_fpga_not_ready(void) { - int ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS, true); + int ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS, true, NULL); if ((ret != MBOX_RET_OK) && (ret != MBOX_CFGSTAT_STATE_CONFIG)) { ret = intel_mailbox_get_config_status(MBOX_CONFIG_STATUS, - false); + false, NULL); } return ret; diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c index 68deab90b..71a626dfc 100644 --- a/plat/intel/soc/common/socfpga_sip_svc.c +++ b/plat/intel/soc/common/socfpga_sip_svc.c @@ -94,22 +94,25 @@ static int intel_fpga_sdm_write_all(void) return 0; } -static uint32_t intel_mailbox_fpga_config_isdone(void) +static uint32_t intel_mailbox_fpga_config_isdone(uint32_t *err_states) { uint32_t ret; + if (err_states == NULL) + return INTEL_SIP_SMC_STATUS_REJECTED; + switch (request_type) { case RECONFIGURATION: ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS, - true); + true, err_states); break; case BITSTREAM_AUTH: ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS, - false); + false, err_states); break; default: ret = intel_mailbox_get_config_status(MBOX_CONFIG_STATUS, - false); + false, err_states); break; } @@ -814,6 +817,7 @@ uintptr_t sip_smc_handler_v1(uint32_t smc_fid, uint32_t retval = 0, completed_addr[3]; uint32_t retval2 = 0; uint32_t mbox_error = 0; + uint32_t err_states = 0; uint64_t retval64, rsu_respbuf[9]; uint32_t seu_respbuf[3]; int status = INTEL_SIP_SMC_STATUS_OK; @@ -827,8 +831,8 @@ uintptr_t sip_smc_handler_v1(uint32_t smc_fid, SMC_UUID_RET(handle, intl_svc_uid); case INTEL_SIP_SMC_FPGA_CONFIG_ISDONE: - status = intel_mailbox_fpga_config_isdone(); - SMC_RET4(handle, status, 0, 0, 0); + status = intel_mailbox_fpga_config_isdone(&err_states); + SMC_RET4(handle, status, err_states, 0, 0); case INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM: SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK,