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https://github.com/ARM-software/arm-trusted-firmware.git
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Introduce asm console functions in TF
This patch replaces the pl011 console family of functions with their equivalents defined in assembly. The baud rate is defined by the PL011_BAUDRATE macro and IBRD and FBRD values for pl011 are computed statically. This patch will enable us to invoke the console functions without the C Runtime Stack. Change-Id: Ic3f7b7370ded38bf9020bf746b362081b76642c7
This commit is contained in:
parent
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commit
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5 changed files with 179 additions and 198 deletions
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@ -1,41 +0,0 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <assert.h>
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#include <pl011.h>
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void pl011_setbaudrate(unsigned long base_addr, unsigned int baudrate)
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{
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unsigned int divisor;
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assert(baudrate);
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divisor = (PL011_CLK_IN_HZ * 4) / baudrate;
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pl011_write_ibrd(base_addr, divisor >> 6);
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pl011_write_fbrd(base_addr, divisor & 0x3F);
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}
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175
drivers/arm/pl011/pl011_console.S
Normal file
175
drivers/arm/pl011/pl011_console.S
Normal file
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@ -0,0 +1,175 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <pl011.h>
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.globl console_init
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.globl console_putc
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.globl console_core_init
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.globl console_core_putc
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.globl console_getc
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/*
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* The console base is in the data section and not in .bss
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* even though it is zero-init. In particular, this allows
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* the console functions to start using this variable before
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* the runtime memory is initialized for images which do not
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* need to copy the .data section from ROM to RAM.
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*/
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.section .data.console_base ; .align 3
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console_base: .quad 0x0
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/* ---------------------------------------------
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* int console_init(unsigned long base_addr)
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* Function to initialize the console without a
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* C Runtime to print debug information. It saves
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* the console base to the data section.
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* In: x0 - console base address
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* out: return 1 on success.
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* Clobber list : x1, x2
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* ---------------------------------------------
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*/
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func console_init
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adrp x1, console_base
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str x0, [x1, :lo12:console_base]
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b console_core_init
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/* ---------------------------------------------
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* int console_core_init(unsigned long base_addr)
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* Function to initialize the console without a
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* C Runtime to print debug information. This
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* function will be accessed by console_init and
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* crash reporting.
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* In: x0 - console base address
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* Out: return 1 on success
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* Clobber list : x1, x2
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* ---------------------------------------------
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*/
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func console_core_init
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/* Check the input base address */
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cbz x0, init_fail
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/* Program the baudrate */
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#if defined(PL011_INTEGER) && defined(PL011_FRACTIONAL)
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mov w1, #PL011_INTEGER
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str w1, [x0, #UARTIBRD]
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mov w1, #PL011_FRACTIONAL
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str w1, [x0, #UARTFBRD]
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#else
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.set BRD, ((PL011_CLK_IN_HZ << 2) / PL011_BAUDRATE)
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/* Write the IBRD */
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mov w1, #((BRD >> 6) & 0xffff)
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.if BRD>=0x400000
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movk w1, #(BRD >> 22), LSL #16
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.endif
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str w1, [x0, #UARTIBRD]
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/* Write the FBRD */
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mov w1, #(BRD & 0x3f)
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str w1, [x0, #UARTFBRD]
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#endif
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mov w1, #PL011_LINE_CONTROL
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str w1, [x0, #UARTLCR_H]
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/* Clear any pending errors */
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str wzr, [x0, #UARTECR]
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/* Enable tx, rx, and uart overall */
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mov w1, #(PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN)
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str w1, [x0, #UARTCR]
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mov w0, #1
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init_fail:
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ret
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/* ---------------------------------------------
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* int console_putc(int c)
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* Function to output a character over the
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* console. It returns the character printed on
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* success or -1 on error.
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* In : x0 - character to be printed
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* Out : return -1 on error else return character.
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* Clobber list : x1, x2
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* ---------------------------------------------
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*/
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func console_putc
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adrp x2, console_base
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ldr x1, [x2, :lo12:console_base]
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b console_core_putc
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/* --------------------------------------------------------
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* int console_core_putc(int c, unsigned long base_addr)
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* Function to output a character over the console. It
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* returns the character printed on success or -1 on error.
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* In : x0 - character to be printed
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* x1 - console base address
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* Out : return -1 on error else return character.
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* Clobber list : x2
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* --------------------------------------------------------
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*/
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func console_core_putc
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/* Check the input parameter */
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cbz x1, putc_error
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/* Prepend '\r' to '\n' */
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cmp x0, #0xA
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b.ne 2f
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1:
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/* Check if the transmit FIFO is full */
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ldr w2, [x1, #UARTFR]
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tbnz w2, #PL011_UARTFR_TXFF_BIT, 1b
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mov w2, #0xD
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str w2, [x1, #UARTDR]
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2:
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/* Check if the transmit FIFO is full */
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ldr w2, [x1, #UARTFR]
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tbnz w2, #PL011_UARTFR_TXFF_BIT, 2b
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str w0, [x1, #UARTDR]
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ret
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putc_error:
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mov w0, #-1
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ret
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/* ---------------------------------------------
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* int console_getc(void)
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* Function to get a character from the console.
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* It returns the character grabbed on success
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* or -1 on error.
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func console_getc
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adrp x0, console_base
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ldr x1, [x0, :lo12:console_base]
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cbz x1, getc_error
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1:
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/* Check if the receive FIFO is empty */
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ldr w0, [x1, #UARTFR]
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tbnz w0, #PL011_UARTFR_RXFE_BIT, 1b
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ldr w0, [x1, #UARTDR]
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ret
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getc_error:
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mov w0, #-1
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ret
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@ -1,98 +0,0 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <assert.h>
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#include <console.h>
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#include <pl011.h>
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static unsigned long uart_base;
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void console_init(unsigned long base_addr)
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{
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/* TODO: assert() internally calls printf() and will result in
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* an infinite loop. This needs to be fixed with some kind of
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* exception mechanism or early panic support. This also applies
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* to the other assert() calls below.
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*/
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assert(base_addr);
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/* Initialise internal base address variable */
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uart_base = base_addr;
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/* Baud Rate */
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#if defined(PL011_INTEGER) && defined(PL011_FRACTIONAL)
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pl011_write_ibrd(uart_base, PL011_INTEGER);
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pl011_write_fbrd(uart_base, PL011_FRACTIONAL);
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#else
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pl011_setbaudrate(uart_base, PL011_BAUDRATE);
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#endif
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pl011_write_lcr_h(uart_base, PL011_LINE_CONTROL);
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/* Clear any pending errors */
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pl011_write_ecr(uart_base, 0);
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/* Enable tx, rx, and uart overall */
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pl011_write_cr(uart_base, PL011_UARTCR_RXE | PL011_UARTCR_TXE |
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PL011_UARTCR_UARTEN);
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}
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#define WAIT_UNTIL_UART_FREE(base) \
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while ((pl011_read_fr(base) & PL011_UARTFR_TXFF)) \
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continue
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int console_putc(int c)
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{
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/* If the console has not been initialized then return an error
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* code. Asserting here would result in recursion and stack
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* exhaustion
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*/
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if (!uart_base)
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return -1;
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if (c == '\n') {
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WAIT_UNTIL_UART_FREE(uart_base);
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pl011_write_dr(uart_base, '\r');
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}
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WAIT_UNTIL_UART_FREE(uart_base);
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pl011_write_dr(uart_base, c);
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return c;
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}
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int console_getc(void)
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{
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assert(uart_base);
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while ((pl011_read_fr(uart_base) & PL011_UARTFR_RXFE) != 0)
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;
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return pl011_read_dr(uart_base);
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}
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@ -31,9 +31,6 @@
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#ifndef __PL011_H__
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#define __PL011_H__
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#include <mmio.h>
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/* PL011 Registers */
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#define UARTDR 0x000
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#define UARTRSR 0x004
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#define PL011_UARTFR_DSR (1 << 1) /* Data set ready */
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#define PL011_UARTFR_CTS (1 << 0) /* Clear to send */
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#define PL011_UARTFR_TXFF_BIT 5 /* Transmit FIFO full bit in UARTFR register */
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#define PL011_UARTFR_RXFE_BIT 4 /* Receive FIFO empty bit in UARTFR register */
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/* Control reg bits */
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#define PL011_UARTCR_CTSEN (1 << 15) /* CTS hardware flow control enable */
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#define PL011_UARTCR_RTSEN (1 << 14) /* RTS hardware flow control enable */
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#define PL011_UARTLCR_H_PEN (1 << 1) /* Parity Enable */
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#define PL011_UARTLCR_H_BRK (1 << 0) /* Send break */
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/*******************************************************************************
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* Pl011 CPU interface accessors for writing registers
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******************************************************************************/
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static inline void pl011_write_ibrd(unsigned long base, unsigned int val)
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{
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mmio_write_32(base + UARTIBRD, val);
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}
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static inline void pl011_write_fbrd(unsigned long base, unsigned int val)
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{
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mmio_write_32(base + UARTFBRD, val);
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}
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static inline void pl011_write_lcr_h(unsigned long base, unsigned int val)
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{
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mmio_write_32(base + UARTLCR_H, val);
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}
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static inline void pl011_write_ecr(unsigned long base, unsigned int val)
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{
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mmio_write_32(base + UARTECR, val);
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}
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static inline void pl011_write_cr(unsigned long base, unsigned int val)
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{
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mmio_write_32(base + UARTCR, val);
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}
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static inline void pl011_write_dr(unsigned long base, unsigned int val)
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{
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mmio_write_32(base + UARTDR, val);
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}
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/*******************************************************************************
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* Pl011 CPU interface accessors for reading registers
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******************************************************************************/
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static inline unsigned int pl011_read_fr(unsigned long base)
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{
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return mmio_read_32(base + UARTFR);
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}
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static inline unsigned int pl011_read_dr(unsigned long base)
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{
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return mmio_read_32(base + UARTDR);
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}
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/*******************************************************************************
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* Function prototypes
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******************************************************************************/
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void pl011_setbaudrate(unsigned long base_addr, unsigned int baudrate);
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#endif /* __PL011_H__ */
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@ -45,8 +45,7 @@ $(eval $(call add_define,TSP_RAM_LOCATION_ID))
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PLAT_INCLUDES := -Iplat/fvp/include/
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PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011.c \
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drivers/arm/pl011/pl011_console.c \
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PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_semihosting.c \
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