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Unify type of "cpu_idx" across PSCI module.
cpu_idx is used as mix of `unsigned int` and `signed int` in code with typecasting at some places. This change is to unify the cpu_idx as `unsigned int` as underlying API;s `plat_my_core_pos` returns `unsigned int` It was discovered via coverity issue CID 354715 Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I4f0adb0c596ff1177210c5fe803bff853f2e54ce
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5dbdf8e4ea
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2 changed files with 19 additions and 17 deletions
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@ -159,9 +159,10 @@ void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info)
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******************************************************************************/
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******************************************************************************/
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unsigned int psci_is_last_on_cpu(void)
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unsigned int psci_is_last_on_cpu(void)
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{
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{
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int cpu_idx, my_idx = (int) plat_my_core_pos();
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unsigned int cpu_idx, my_idx = plat_my_core_pos();
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for (cpu_idx = 0; cpu_idx < PLATFORM_CORE_COUNT; cpu_idx++) {
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for (cpu_idx = 0; cpu_idx < (unsigned int)PLATFORM_CORE_COUNT;
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cpu_idx++) {
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if (cpu_idx == my_idx) {
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if (cpu_idx == my_idx) {
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assert(psci_get_aff_info_state() == AFF_STATE_ON);
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assert(psci_get_aff_info_state() == AFF_STATE_ON);
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continue;
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continue;
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@ -206,7 +207,7 @@ static void psci_set_req_local_pwr_state(unsigned int pwrlvl,
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{
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{
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assert(pwrlvl > PSCI_CPU_PWR_LVL);
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assert(pwrlvl > PSCI_CPU_PWR_LVL);
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if ((pwrlvl > PSCI_CPU_PWR_LVL) && (pwrlvl <= PLAT_MAX_PWR_LVL) &&
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if ((pwrlvl > PSCI_CPU_PWR_LVL) && (pwrlvl <= PLAT_MAX_PWR_LVL) &&
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(cpu_idx < PLATFORM_CORE_COUNT)) {
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(cpu_idx < (unsigned int) PLATFORM_CORE_COUNT)) {
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psci_req_local_pwr_states[pwrlvl - 1U][cpu_idx] = req_pwr_state;
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psci_req_local_pwr_states[pwrlvl - 1U][cpu_idx] = req_pwr_state;
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}
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}
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}
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}
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@ -237,12 +238,12 @@ void __init psci_init_req_local_pwr_states(void)
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* assertion is added to prevent us from accessing the CPU power level.
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* assertion is added to prevent us from accessing the CPU power level.
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*****************************************************************************/
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*****************************************************************************/
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static plat_local_state_t *psci_get_req_local_pwr_states(unsigned int pwrlvl,
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static plat_local_state_t *psci_get_req_local_pwr_states(unsigned int pwrlvl,
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int cpu_idx)
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unsigned int cpu_idx)
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{
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{
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assert(pwrlvl > PSCI_CPU_PWR_LVL);
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assert(pwrlvl > PSCI_CPU_PWR_LVL);
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if ((pwrlvl > PSCI_CPU_PWR_LVL) && (pwrlvl <= PLAT_MAX_PWR_LVL) &&
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if ((pwrlvl > PSCI_CPU_PWR_LVL) && (pwrlvl <= PLAT_MAX_PWR_LVL) &&
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(cpu_idx < PLATFORM_CORE_COUNT)) {
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(cpu_idx < (unsigned int) PLATFORM_CORE_COUNT)) {
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return &psci_req_local_pwr_states[pwrlvl - 1U][cpu_idx];
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return &psci_req_local_pwr_states[pwrlvl - 1U][cpu_idx];
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} else
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} else
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return NULL;
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return NULL;
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@ -351,7 +352,7 @@ static void psci_set_target_local_pwr_states(unsigned int end_pwrlvl,
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/*******************************************************************************
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/*******************************************************************************
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* PSCI helper function to get the parent nodes corresponding to a cpu_index.
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* PSCI helper function to get the parent nodes corresponding to a cpu_index.
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******************************************************************************/
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******************************************************************************/
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void psci_get_parent_pwr_domain_nodes(int cpu_idx,
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void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
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unsigned int end_lvl,
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unsigned int end_lvl,
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unsigned int *node_index)
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unsigned int *node_index)
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{
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{
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@ -417,7 +418,7 @@ void psci_do_state_coordination(unsigned int end_pwrlvl,
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psci_power_state_t *state_info)
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psci_power_state_t *state_info)
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{
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{
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unsigned int lvl, parent_idx, cpu_idx = plat_my_core_pos();
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unsigned int lvl, parent_idx, cpu_idx = plat_my_core_pos();
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int start_idx;
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unsigned int start_idx;
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unsigned int ncpus;
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unsigned int ncpus;
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plat_local_state_t target_state, *req_states;
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plat_local_state_t target_state, *req_states;
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@ -763,7 +764,7 @@ int psci_validate_entry_point(entry_point_info_t *ep,
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void psci_warmboot_entrypoint(void)
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void psci_warmboot_entrypoint(void)
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{
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{
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unsigned int end_pwrlvl;
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unsigned int end_pwrlvl;
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int cpu_idx = (int) plat_my_core_pos();
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unsigned int cpu_idx = plat_my_core_pos();
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unsigned int parent_nodes[PLAT_MAX_PWR_LVL] = {0};
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unsigned int parent_nodes[PLAT_MAX_PWR_LVL] = {0};
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psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
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psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -55,16 +55,16 @@ static inline aff_info_state_t psci_get_aff_info_state(void)
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return get_cpu_data(psci_svc_cpu_data.aff_info_state);
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return get_cpu_data(psci_svc_cpu_data.aff_info_state);
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}
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}
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static inline aff_info_state_t psci_get_aff_info_state_by_idx(int idx)
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static inline aff_info_state_t psci_get_aff_info_state_by_idx(unsigned int idx)
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{
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{
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return get_cpu_data_by_index((unsigned int)idx,
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return get_cpu_data_by_index(idx,
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psci_svc_cpu_data.aff_info_state);
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psci_svc_cpu_data.aff_info_state);
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}
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}
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static inline void psci_set_aff_info_state_by_idx(int idx,
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static inline void psci_set_aff_info_state_by_idx(unsigned int idx,
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aff_info_state_t aff_state)
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aff_info_state_t aff_state)
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{
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{
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set_cpu_data_by_index((unsigned int)idx,
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set_cpu_data_by_index(idx,
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psci_svc_cpu_data.aff_info_state, aff_state);
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psci_svc_cpu_data.aff_info_state, aff_state);
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}
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}
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@ -88,9 +88,10 @@ static inline plat_local_state_t psci_get_cpu_local_state(void)
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return get_cpu_data(psci_svc_cpu_data.local_state);
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return get_cpu_data(psci_svc_cpu_data.local_state);
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}
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}
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static inline plat_local_state_t psci_get_cpu_local_state_by_idx(int idx)
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static inline plat_local_state_t psci_get_cpu_local_state_by_idx(
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unsigned int idx)
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{
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{
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return get_cpu_data_by_index((unsigned int)idx,
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return get_cpu_data_by_index(idx,
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psci_svc_cpu_data.local_state);
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psci_svc_cpu_data.local_state);
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}
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}
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@ -113,7 +114,7 @@ typedef struct non_cpu_pwr_domain_node {
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* Index of the first CPU power domain node level 0 which has this node
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* Index of the first CPU power domain node level 0 which has this node
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* as its parent.
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* as its parent.
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*/
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*/
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int cpu_start_idx;
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unsigned int cpu_start_idx;
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/*
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/*
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* Number of CPU power domains which are siblings of the domain indexed
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* Number of CPU power domains which are siblings of the domain indexed
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@ -269,7 +270,7 @@ void psci_get_target_local_pwr_states(unsigned int end_pwrlvl,
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psci_power_state_t *target_state);
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psci_power_state_t *target_state);
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int psci_validate_entry_point(entry_point_info_t *ep,
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int psci_validate_entry_point(entry_point_info_t *ep,
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uintptr_t entrypoint, u_register_t context_id);
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uintptr_t entrypoint, u_register_t context_id);
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void psci_get_parent_pwr_domain_nodes(int cpu_idx,
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void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
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unsigned int end_lvl,
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unsigned int end_lvl,
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unsigned int *node_index);
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unsigned int *node_index);
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void psci_do_state_coordination(unsigned int end_pwrlvl,
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void psci_do_state_coordination(unsigned int end_pwrlvl,
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