refactor(build): reorder arch features handling

With commit@f5211420b(refactor(cpufeat): refactor arch feature build
options all mandatory options are enabled with
'make_helpers/arch_features.mk'

However the commit makes it impossible for enabling of mandatory
features through command line and platform make files, So re-order
handling of mandatory features in 'make_helpers/arch_features.mk'

Use below order to enable mandatory features.

1.) first enable mandatory features by arch major/minor
2.) check if features were not earlier defined in platform makefile or
through cmdline if defined earlier don't initialise them to '0' but
retain their values from prior initialisation.

Change-Id: Icea3180c9dda0cd6e0b59316add9f3290ae51972
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
This commit is contained in:
Govindraj Raja 2023-10-09 13:56:06 -05:00
parent cf953bca5c
commit fb7301170e

View file

@ -8,82 +8,10 @@
# and enables them based on the configured architecture version.
# This file follows the following format:
# - By default disable any mandatory features.
# - Then Enable mandatory feature if applicable to an Arch Version.
# - Enable mandatory feature if applicable to an Arch Version.
# - By default disable any mandatory features if they have not been defined yet.
# - Disable or enable any optional feature this would be enabled/disabled if needed by platform.
#
################################################################################
# Set mandatory features by default to zero.
################################################################################
#
#----
# 8.1
#----
# Flag to enable access to Privileged Access Never bit of PSTATE.
ENABLE_FEAT_PAN := 0
# Flag to enable Virtualization Host Extensions.
ENABLE_FEAT_VHE := 0
#----
# 8.2
#----
# Enable RAS Support.
ENABLE_FEAT_RAS := 0
#----
# 8.4
#----
# Flag to enable Secure EL-2 feature.
ENABLE_FEAT_SEL2 := 0
# By default, disable trace filter control register access to lower non-secure
# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but
# trace filter control register access is unused if FEAT_TRF is implemented.
ENABLE_TRF_FOR_NS := 0
# Flag to enable Data Independent Timing instructions.
ENABLE_FEAT_DIT := 0
#----
# 8.5
#----
# Flag to enable access to the Random Number Generator registers.
ENABLE_FEAT_RNG := 0
# Flag to enable Speculation Barrier Instruction.
ENABLE_FEAT_SB := 0
#----
# 8.6
#----
# Flag to enable access to the CNTPOFF_EL2 register.
ENABLE_FEAT_ECV := 0
# Flag to enable access to the HDFGRTR_EL2 register.
ENABLE_FEAT_FGT := 0
#----
# 8.7
#----
# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn.
ENABLE_FEAT_HCX := 0
#----
# 8.9
#----
# Flag to enable access to TCR2 (FEAT_TCR2).
ENABLE_FEAT_TCR2 := 0
#
################################################################################
# Enable Mandatory features based on Arch versions.
@ -136,6 +64,97 @@ ifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
ENABLE_FEAT_TCR2 := 1
endif
#
################################################################################
# Set mandatory features by default to zero.
################################################################################
#
#----
# 8.1
#----
# Flag to enable access to Privileged Access Never bit of PSTATE.
ENABLE_FEAT_PAN ?= 0
# Flag to enable Virtualization Host Extensions.
ENABLE_FEAT_VHE ?= 0
#----
# 8.2
#----
# Enable RAS Support.
ENABLE_FEAT_RAS ?= 0
#----
# 8.3
#----
# Flag to enable Pointer Authentication. Internal flag not meant for
# direct setting. Use BRANCH_PROTECTION to enable PAUTH.
ENABLE_PAUTH ?= 0
# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This
# must be set to 1 if the platform wants to use this feature in the Secure
# world. It is not necessary for use in the Non-secure world.
CTX_INCLUDE_PAUTH_REGS ?= 0
#----
# 8.4
#----
# Flag to enable Secure EL-2 feature.
ENABLE_FEAT_SEL2 ?= 0
# By default, disable trace filter control register access to lower non-secure
# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but
# trace filter control register access is unused if FEAT_TRF is implemented.
ENABLE_TRF_FOR_NS ?= 0
# Flag to enable Data Independent Timing instructions.
ENABLE_FEAT_DIT ?= 0
#----
# 8.5
#----
# Flag to enable Branch Target Identification.
# Internal flag not meant for direct setting.
# Use BRANCH_PROTECTION to enable BTI.
ENABLE_BTI ?= 0
# Flag to enable access to the Random Number Generator registers.
ENABLE_FEAT_RNG ?= 0
# Flag to enable Speculation Barrier Instruction.
ENABLE_FEAT_SB ?= 0
#----
# 8.6
#----
# Flag to enable access to the CNTPOFF_EL2 register.
ENABLE_FEAT_ECV ?= 0
# Flag to enable access to the HDFGRTR_EL2 register.
ENABLE_FEAT_FGT ?= 0
#----
# 8.7
#----
# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn.
ENABLE_FEAT_HCX ?= 0
#----
# 8.9
#----
# Flag to enable access to TCR2 (FEAT_TCR2).
ENABLE_FEAT_TCR2 ?= 0
#
################################################################################
# Optional Features defaulted to 0 or 2, if they are not enabled from
@ -185,19 +204,6 @@ else ifeq (${ARCH},aarch32)
endif
endif
#----
# 8.3
#----
# Flag to enable Pointer Authentication. Internal flag not meant for
# direct setting. Use BRANCH_PROTECTION to enable PAUTH.
ENABLE_PAUTH ?= 0
# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This
# must be set to 1 if the platform wants to use this feature in the Secure
# world. It is not necessary for use in the Non-secure world.
CTX_INCLUDE_PAUTH_REGS ?= 0
#----
# 8.4
#----
@ -238,11 +244,6 @@ ENABLE_FEAT_RNG_TRAP ?= 0
# enabled at ELX.
CTX_INCLUDE_MTE_REGS ?= 0
# Flag to enable Branch Target Identification.
# Internal flag not meant for direct setting.
# Use BRANCH_PROTECTION to enable BTI.
ENABLE_BTI ?= 0
#----
# 8.6
#----