fix(versal2): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ib152831e84f5ead5b57fd713ebfedb1f3340a727
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This commit is contained in:
Maheedhar Bollapalli 2024-10-29 03:53:19 +00:00
parent 5003a332b8
commit fb2fdcd953
5 changed files with 53 additions and 29 deletions

View file

@ -170,16 +170,19 @@ int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
{
static uint32_t index;
uint32_t i;
int32_t ret = 0;
/* Validate 'handler' and 'id' parameters */
if ((handler == NULL) || (index >= MAX_INTR_EL3)) {
return -EINVAL;
ret = -EINVAL;
goto exit_label;
}
/* Check if a handler has already been registered */
for (i = 0; i < index; i++) {
if (id == type_el3_interrupt_table[i].id) {
return -EALREADY;
ret = -EALREADY;
goto exit_label;
}
}
@ -188,7 +191,8 @@ int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
index++;
return 0;
exit_label:
return ret;
}
static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags,

View file

@ -24,6 +24,9 @@
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * PLATFORM_CORE_COUNT_PER_CLUSTER)
#define E_INVALID_CORE_COUNT -1
#define E_INVALID_CLUSTER_COUNT -3
#define PLAT_MAX_PWR_LVL U(2)
#define PLAT_MAX_RET_STATE U(1)
#define PLAT_MAX_OFF_STATE U(2)

View file

@ -40,12 +40,14 @@ static int32_t zynqmp_nopmu_pwr_domain_on(u_register_t mpidr)
int32_t cluster = cpu_id / PLATFORM_CORE_COUNT_PER_CLUSTER;
uintptr_t apu_cluster_base = 0, apu_pcli_base, apu_pcli_cluster = 0;
uintptr_t rst_apu_cluster = PSX_CRF + RST_APU0_OFFSET + ((uint64_t)cluster * 0x4U);
int32_t ret = PSCI_E_SUCCESS;
VERBOSE("%s: mpidr: 0x%lx, cpuid: %x, cpu: %x, cluster: %x\n",
__func__, mpidr, cpu_id, cpu, cluster);
if (cpu_id == -1) {
return PSCI_E_INTERN_FAIL;
ret = PSCI_E_INTERN_FAIL;
goto exit_label;
}
if (cluster > 3U) {
@ -84,7 +86,8 @@ static int32_t zynqmp_nopmu_pwr_domain_on(u_register_t mpidr)
mmio_write_32(apu_pcli_base + PCLI_PSTATE_OFFSET, PCLI_PSTATE_VAL_CLEAR);
mmio_write_32(apu_pcli_base + PCLI_PREQ_OFFSET, PREQ_CHANGE_REQUEST);
return PSCI_E_SUCCESS;
exit_label:
return ret;
}
static void zynqmp_nopmu_pwr_domain_off(const psci_power_state_t *target_state)
@ -101,13 +104,15 @@ static void __dead2 zynqmp_nopmu_system_reset(void)
static int32_t zynqmp_validate_ns_entrypoint(uint64_t ns_entrypoint)
{
int32_t ret = PSCI_E_INVALID_ADDRESS;
VERBOSE("Validate ns_entry point %lx\n", ns_entrypoint);
if ((ns_entrypoint) != 0U) {
return PSCI_E_SUCCESS;
} else {
return PSCI_E_INVALID_ADDRESS;
ret = PSCI_E_SUCCESS;
}
return ret;
}
static void zynqmp_pwr_domain_on_finish(const psci_power_state_t *target_state)

View file

@ -41,6 +41,7 @@ const uint8_t *plat_get_power_domain_tree_desc(void)
int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
{
uint32_t cluster_id, cpu_id;
int32_t ret = 0;
mpidr &= MPIDR_AFFINITY_MASK;
@ -48,7 +49,8 @@ int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
cpu_id = MPIDR_AFFLVL1_VAL(mpidr);
if (cluster_id >= PLATFORM_CLUSTER_COUNT) {
return -3;
ret = E_INVALID_CLUSTER_COUNT;
goto exit_label;
}
/*
@ -56,8 +58,11 @@ int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
* one of the two clusters present on the platform.
*/
if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) {
return -1;
ret = E_INVALID_CORE_COUNT;
} else {
ret = (cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER));
}
return (cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER));
exit_label:
return ret;
}

View file

@ -288,13 +288,16 @@ int32_t plat_scmi_clock_rates_array(unsigned int agent_id, unsigned int scmi_id,
uint32_t start_idx)
{
const struct scmi_clk *clock = clk_find(agent_id, scmi_id);
int32_t ret = SCMI_SUCCESS;
if (clock == NULL) {
return SCMI_NOT_FOUND;
ret = SCMI_NOT_FOUND;
goto exit_label;
}
if (start_idx > 0U) {
return SCMI_OUT_OF_RANGE;
ret = SCMI_OUT_OF_RANGE;
goto exit_label;
}
if (array == NULL) {
@ -304,10 +307,11 @@ int32_t plat_scmi_clock_rates_array(unsigned int agent_id, unsigned int scmi_id,
VERBOSE("SCMI: CLK: id: %d, clk_name: %s, get_rate %lu\n",
scmi_id, clock->name, *array);
} else {
return SCMI_GENERIC_ERROR;
ret = SCMI_GENERIC_ERROR;
}
return SCMI_SUCCESS;
exit_label:
return ret;
}
unsigned long plat_scmi_clock_get_rate(unsigned int agent_id, unsigned int scmi_id)
@ -529,12 +533,13 @@ size_t plat_scmi_pd_count(unsigned int agent_id)
const char *plat_scmi_pd_get_name(unsigned int agent_id, unsigned int pd_id)
{
const struct scmi_pd *pd = find_pd(agent_id, pd_id);
const char *ret = NULL;
if (pd == NULL) {
return NULL;
if (pd != NULL) {
ret = pd->name;
}
return pd->name;
return ret;
}
unsigned int plat_scmi_pd_statistics(unsigned int agent_id, unsigned long *pd_id)
@ -550,14 +555,15 @@ unsigned int plat_scmi_pd_get_attributes(unsigned int agent_id, unsigned int pd_
unsigned int plat_scmi_pd_get_state(unsigned int agent_id, unsigned int pd_id)
{
const struct scmi_pd *pd = find_pd(agent_id, pd_id);
uint32_t ret = SCMI_NOT_SUPPORTED;
if (pd == NULL) {
return SCMI_NOT_SUPPORTED;
if (pd != NULL) {
NOTICE("SCMI: PD: get id: %d, state: %x\n", pd_id, pd->state);
ret = pd->state;
}
NOTICE("SCMI: PD: get id: %d, state: %x\n", pd_id, pd->state);
return pd->state;
return ret;
}
int32_t plat_scmi_pd_set_state(unsigned int agent_id, unsigned int flags, unsigned int pd_id,
@ -568,14 +574,15 @@ int32_t plat_scmi_pd_set_state(unsigned int agent_id, unsigned int flags, unsign
if (pd == NULL) {
ret = SCMI_NOT_SUPPORTED;
} else {
NOTICE("SCMI: PD: set id: %d, orig state: %x, new state: %x, flags: %x\n",
pd_id, pd->state, state, flags);
pd->state = state;
goto exit_label;
}
NOTICE("SCMI: PD: set id: %d, orig state: %x, new state: %x, flags: %x\n",
pd_id, pd->state, state, flags);
pd->state = state;
exit_label:
return ret;
}