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fix(cpus): workaround for Cortex-X2 erratum 2282622
Cortex-X2 erratum 2282622 is a Cat B erratum that applies to all revisions <=r2p1 and is still open. The workaround is to set CPUACTLR2_EL1[0] to 1 to force PLDW/PFRM ST to behave like PLD/PRFM LD and not cause invalidations to other PE caches. SDEN documentation: https://developer.arm.com/documentation/SDEN1775100/latest Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I43956aa4898a8608eedc5d0dd1471172c641a0c6
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3 changed files with 84 additions and 35 deletions
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@ -579,29 +579,33 @@ For Cortex-X2, the following errata build flags are defined :
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- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2
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- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2
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CPU. This needs to be enabled for revision r2p0 of the CPU, it is still open.
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CPU. This needs to be enabled for revision r2p0 of the CPU, it is still open.
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- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to
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- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to Cortex-X2
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Cortex-X2 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
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CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
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r2p0 of the CPU, it is fixed in r2p1.
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CPU, it is fixed in r2p1.
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- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to
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- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to Cortex-X2
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Cortex-X2 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
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CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
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r2p0 of the CPU, it is fixed in r2p1.
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CPU, it is fixed in r2p1.
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- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to
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- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to Cortex-X2
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Cortex-X2 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
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CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
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r2p0 of the CPU, it is fixed in r2p1.
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CPU, it is fixed in r2p1.
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- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to
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- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to Cortex-X2
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Cortex-X2 CPU. This needs to be enabled only for revision r2p0 of the CPU,
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CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
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it is fixed in r2p1.
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in r2p1.
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- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to
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- ``ERRATA_X2_2282622``: This applies errata 2282622 workaround to Cortex-X2
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Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
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CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
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of the CPU and is fixed in r2p1.
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CPU and is still open.
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- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to
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- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to Cortex-X2
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Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0
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CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 of the CPU
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and r2p1 of the CPU and is still open.
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and is fixed in r2p1.
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- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2
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CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
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CPU and is still open.
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For Cortex-X3, the following errata build flags are defined :
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For Cortex-X3, the following errata build flags are defined :
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@ -742,7 +746,7 @@ GIC Errata Workarounds
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--------------
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--------------
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*Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved.*
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*Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved.*
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.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715
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.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715
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.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639
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.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2021-2022, Arm Limited. All rights reserved.
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* Copyright (c) 2021-2023, Arm Limited. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -267,6 +267,36 @@ func check_errata_2147715
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b cpu_rev_var_range
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b cpu_rev_var_range
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endfunc check_errata_2147715
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endfunc check_errata_2147715
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/* ---------------------------------------------------------------
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* Errata Workaround for Cortex-X2 Erratum 2282622.
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* This applies to revision r0p0, r1p0, r2p0 and r2p1.
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* It is still open.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0, x1, x17
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* ---------------------------------------------------------------
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*/
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func errata_x2_2282622_wa
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/* Compare x0 against revision r2p1 */
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mov x17, x30
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bl check_errata_2282622
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cbz x0, 1f
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/* Apply the workaround */
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mrs x1, CORTEX_X2_CPUACTLR2_EL1
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orr x1, x1, #BIT(0)
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msr CORTEX_X2_CPUACTLR2_EL1, x1
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1:
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ret x17
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endfunc errata_x2_2282622_wa
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func check_errata_2282622
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/* Applies to r0p0, r1p0, r2p0 and r2p1 */
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mov x1, #0x21
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b cpu_rev_var_ls
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endfunc check_errata_2282622
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/* -------------------------------------------------------
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/* -------------------------------------------------------
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* Errata Workaround for Cortex-X2 Erratum 2371105.
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* Errata Workaround for Cortex-X2 Erratum 2371105.
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* This applies to revisions <= r2p0 and is fixed in r2p1.
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* This applies to revisions <= r2p0 and is fixed in r2p1.
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@ -362,6 +392,7 @@ func cortex_x2_errata_report
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report_errata ERRATA_X2_2083908, cortex_x2, 2083908
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report_errata ERRATA_X2_2083908, cortex_x2, 2083908
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report_errata ERRATA_X2_2147715, cortex_x2, 2147715
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report_errata ERRATA_X2_2147715, cortex_x2, 2147715
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report_errata ERRATA_X2_2216384, cortex_x2, 2216384
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report_errata ERRATA_X2_2216384, cortex_x2, 2216384
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report_errata ERRATA_X2_2282622, cortex_x2, 2282622
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report_errata ERRATA_X2_2371105, cortex_x2, 2371105
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report_errata ERRATA_X2_2371105, cortex_x2, 2371105
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report_errata ERRATA_X2_2768515, cortex_x2, 2768515
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report_errata ERRATA_X2_2768515, cortex_x2, 2768515
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report_errata WORKAROUND_CVE_2022_23960, cortex_x2, cve_2022_23960
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report_errata WORKAROUND_CVE_2022_23960, cortex_x2, cve_2022_23960
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@ -421,6 +452,11 @@ func cortex_x2_reset_func
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bl errata_x2_2147715_wa
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bl errata_x2_2147715_wa
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#endif
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#endif
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#if ERRATA_X2_2282622
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mov x0, x18
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bl errata_x2_2282622_wa
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#endif
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#if ERRATA_X2_2371105
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#if ERRATA_X2_2371105
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mov x0, x18
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mov x0, x18
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bl errata_x2_2371105_wa
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bl errata_x2_2371105_wa
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@ -1,5 +1,5 @@
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#
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#
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# Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved.
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# Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved.
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# Copyright (c) 2020-2022, NVIDIA Corporation. All rights reserved.
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# Copyright (c) 2020-2022, NVIDIA Corporation. All rights reserved.
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#
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#
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# SPDX-License-Identifier: BSD-3-Clause
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# SPDX-License-Identifier: BSD-3-Clause
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@ -657,6 +657,11 @@ ERRATA_X2_2216384 ?=0
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# only to revision r2p0 of the Cortex-X2 cpu, it is fixed in r2p1.
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# only to revision r2p0 of the Cortex-X2 cpu, it is fixed in r2p1.
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ERRATA_X2_2147715 ?=0
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ERRATA_X2_2147715 ?=0
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# Flag to apply erratum 2282622 workaround during reset. This erratum applies
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# to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is still
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# open.
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ERRATA_X2_2282622 ?=0
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# Flag to apply erratum 2371105 workaround during reset. This erratum applies
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# Flag to apply erratum 2371105 workaround during reset. This erratum applies
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# to revision r0p0, r1p0 and r2p0 of the Cortex-X2 cpu and is fixed in r2p1.
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# to revision r0p0, r1p0 and r2p0 of the Cortex-X2 cpu and is fixed in r2p1.
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ERRATA_X2_2371105 ?=0
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ERRATA_X2_2371105 ?=0
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@ -1299,6 +1304,10 @@ $(eval $(call add_define,ERRATA_X2_2216384))
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$(eval $(call assert_boolean,ERRATA_X2_2147715))
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$(eval $(call assert_boolean,ERRATA_X2_2147715))
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$(eval $(call add_define,ERRATA_X2_2147715))
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$(eval $(call add_define,ERRATA_X2_2147715))
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# Process ERRATA_X2_2282622 flag
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$(eval $(call assert_boolean,ERRATA_X2_2282622))
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$(eval $(call add_define,ERRATA_X2_2282622))
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# Process ERRATA_X2_2371105 flag
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# Process ERRATA_X2_2371105 flag
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$(eval $(call assert_boolean,ERRATA_X2_2371105))
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$(eval $(call assert_boolean,ERRATA_X2_2371105))
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$(eval $(call add_define,ERRATA_X2_2371105))
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$(eval $(call add_define,ERRATA_X2_2371105))
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