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refactor(cpus): convert the Cortex-X3 to use the cpu helpers
Change-Id: I922d3d0e81deb5ff7d89aaa1e7a96ef72d3d6943 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
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1 changed files with 3 additions and 9 deletions
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@ -27,10 +27,7 @@
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#endif /* WORKAROUND_CVE_2022_23960 */
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workaround_runtime_start cortex_x3, ERRATUM(2313909), ERRATA_X3_2313909
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/* Set bit 36 in ACTLR2_EL1 */
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mrs x1, CORTEX_X3_CPUACTLR2_EL1
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orr x1, x1, #CORTEX_X3_CPUACTLR2_EL1_BIT_36
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msr CORTEX_X3_CPUACTLR2_EL1, x1
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sysreg_bit_set CORTEX_X3_CPUACTLR2_EL1, CORTEX_X3_CPUACTLR2_EL1_BIT_36
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workaround_runtime_end cortex_x3, ERRATUM(2313909), NO_ISB
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check_erratum_ls cortex_x3, ERRATUM(2313909), CPU_REV(1, 0)
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@ -47,8 +44,7 @@ check_erratum_ls cortex_x3, ERRATUM(2615812), CPU_REV(1, 1)
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workaround_reset_start cortex_x3, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
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#if IMAGE_BL31
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adr x0, wa_cve_vbar_cortex_x3
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msr vbar_el3, x0
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override_vector_table wa_cve_vbar_cortex_x3
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#endif /* IMAGE_BL31 */
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workaround_reset_end cortex_x3, CVE(2022, 23960)
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@ -69,9 +65,7 @@ apply_erratum cortex_x3, ERRATUM(2313909), ERRATA_X3_2313909
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* Enable CPU power down bit in power control register
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* ---------------------------------------------------
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*/
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mrs x0, CORTEX_X3_CPUPWRCTLR_EL1
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orr x0, x0, #CORTEX_X3_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
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msr CORTEX_X3_CPUPWRCTLR_EL1, x0
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sysreg_bit_set CORTEX_X3_CPUPWRCTLR_EL1, CORTEX_X3_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
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isb
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ret
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endfunc cortex_x3_core_pwr_dwn
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