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fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT
This patch removes RAS_FFH_SUPPORT macro which is the combination of ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an internal macro FFH_SUPPORT which gets enabled when platforms wants to enable lower EL EA handling at EL3. The internal macro FFH_SUPPORT will be automatically enabled if HANDLE_EA_EL3_FIRST_NS is enabled. FFH_SUPPORT along with ENABLE_FEAT_RAS will be used in source files to provide equivalent check which was provided by RAS_FFH_SUPPORT earlier. In generic code we needed a macro which could abstract both HANDLE_EA_EL3_FIRST_NS and RAS_FFH_SUPPORT macros that had limitations. Former was tied up with NS world only while the latter was tied to RAS feature. This is to allow Secure/Realm world to have their own FFH macros in future. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ie5692ccbf462f5dcc3f005a5beea5aa35124ac73
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29 changed files with 78 additions and 75 deletions
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@ -12,3 +12,10 @@ depends on certain options to be enabled or disabled.
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interest when Armv8.4-SecEL2 or RME extension is implemented.
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Default is 0 (disabled). This option will be set to 1 (enabled) when ``SPD=spmd``
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and ``SPMD_SPM_AT_SEL2`` is set or when ``ENABLE_RME`` is set to 1 (enabled).
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- ``FFH_SUPPORT``: This boolean option provides support to enable Firmware First
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handling (FFH) of External aborts and SError interrupts originating from lower
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ELs which gets trapped in EL3. This option will be set to 1 (enabled) if
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``HANDLE_EA_EL3_FIRST_NS`` is set. Currently only NS world routes EA to EL3 but
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in future when Secure/Realm wants to use FFH then they can introduce new macros
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which will enable this option implicitly.
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@ -811,17 +811,13 @@ Common build options
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- ``PSCI_OS_INIT_MODE``: Boolean flag to enable support for optional PSCI
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OS-initiated mode. This option defaults to 0.
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- ``ENABLE_FEAT_RAS``: Numeric value to enable Armv8.2 RAS features. RAS features
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- ``ENABLE_FEAT_RAS``: Boolean flag to enable Armv8.2 RAS features. RAS features
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are an optional extension for pre-Armv8.2 CPUs, but are mandatory for Armv8.2
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or later CPUs. This flag can take the values 0 or 1. The default value is 0.
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NOTE: This flag enables use of IESB capability to reduce entry latency into
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EL3 even when RAS error handling is not performed on the platform. Hence this
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flag is recommended to be turned on Armv8.2 and later CPUs.
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- ``RAS_FFH_SUPPORT``: Support to enable Firmware first handling of RAS errors
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originating from NS world. When ``RAS_FFH_SUPPORT`` is set to ``1``,
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``HANDLE_EA_EL3_FIRST_NS`` and ``ENABLE_FEAT_RAS`` must also be set to ``1``.
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- ``RESET_TO_BL31``: Enable BL31 entrypoint as the CPU reset vector instead
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of the BL1 entrypoint. It can take the value 0 (CPU reset to BL1
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entrypoint) or 1 (CPU reset to BL31 entrypoint).
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