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pl011: Use generic console_t data structure

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Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.

Change-Id: I7a23327394d142af4b293ea7ccd90b843c54587c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2020-01-25 00:58:35 +00:00
parent 489e298744
commit f695e1e01a
18 changed files with 42 additions and 50 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
drivers/arm/pl011/aarch32/pl011_console.S
View file

@ -91,14 +91,14 @@ endfunc console_pl011_core_init
/* -------------------------------------------------------
* int console_pl011_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
* console_pl011_t *console);
* console_t *console);
* Function to initialize and register a new PL011
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: r0 - UART register base address
* r1 - UART clock in Hz
* r2 - Baud rate
* r3 - pointer to empty console_pl011_t struct
* r3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : r0, r1, r2
* -------------------------------------------------------
@ -108,7 +108,7 @@ func console_pl011_register
mov r4, r3
cmp r4, #0
beq register_fail
str r0, [r4, #CONSOLE_T_PL011_BASE]
str r0, [r4, #CONSOLE_T_BASE]
bl console_pl011_core_init
cmp r0, #0
@ -159,7 +159,7 @@ putc_error:
endfunc console_pl011_core_putc
/* --------------------------------------------------------
* int console_pl011_putc(int c, console_pl011_t *console)
* int console_pl011_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In: r0 - character to be printed
@ -173,7 +173,7 @@ func console_pl011_putc
cmp r1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
ldr r1, [r1, #CONSOLE_T_PL011_BASE]
ldr r1, [r1, #CONSOLE_T_BASE]
b console_pl011_core_putc
endfunc console_pl011_putc
@ -203,7 +203,7 @@ getc_error:
endfunc console_pl011_core_getc
/* ------------------------------------------------
* int console_pl011_getc(console_pl011_t *console)
* int console_pl011_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 if no character is available.
@ -217,7 +217,7 @@ func console_pl011_getc
cmp r0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
ldr r0, [r0, #CONSOLE_T_PL011_BASE]
ldr r0, [r0, #CONSOLE_T_BASE]
b console_pl011_core_getc
endfunc console_pl011_getc
@ -248,7 +248,7 @@ flush_error:
endfunc console_pl011_core_flush
/* ---------------------------------------------
* int console_pl011_flush(console_pl011_t *console)
* int console_pl011_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : r0 - pointer to console_t structure
@ -261,6 +261,6 @@ func console_pl011_flush
cmp r0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
ldr r0, [r0, #CONSOLE_T_PL011_BASE]
ldr r0, [r0, #CONSOLE_T_BASE]
b console_pl011_core_flush
endfunc console_pl011_flush

18
drivers/arm/pl011/aarch64/pl011_console.S
View file

@ -80,14 +80,14 @@ endfunc console_pl011_core_init
/* -----------------------------------------------
* int console_pl011_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
* console_pl011_t *console);
* console_t *console);
* Function to initialize and register a new PL011
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
* x3 - pointer to empty console_pl011_t struct
* x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@ -96,7 +96,7 @@ func console_pl011_register
mov x7, x30
mov x6, x3
cbz x6, register_fail
str x0, [x6, #CONSOLE_T_PL011_BASE]
str x0, [x6, #CONSOLE_T_BASE]
bl console_pl011_core_init
cbz x0, register_fail
@ -143,7 +143,7 @@ func console_pl011_core_putc
endfunc console_pl011_core_putc
/* --------------------------------------------------------
* int console_pl011_putc(int c, console_pl011_t *console)
* int console_pl011_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@ -157,7 +157,7 @@ func console_pl011_putc
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
ldr x1, [x1, #CONSOLE_T_PL011_BASE]
ldr x1, [x1, #CONSOLE_T_BASE]
b console_pl011_core_putc
endfunc console_pl011_putc
@ -189,7 +189,7 @@ no_char:
endfunc console_pl011_core_getc
/* ---------------------------------------------
* int console_pl011_getc(console_pl011_t *console)
* int console_pl011_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 if no character is available.
@ -203,7 +203,7 @@ func console_pl011_getc
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
ldr x0, [x0, #CONSOLE_T_PL011_BASE]
ldr x0, [x0, #CONSOLE_T_BASE]
b console_pl011_core_getc
endfunc console_pl011_getc
@ -231,7 +231,7 @@ func console_pl011_core_flush
endfunc console_pl011_core_flush
/* ---------------------------------------------
* int console_pl011_flush(console_pl011_t *console)
* int console_pl011_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
@ -244,6 +244,6 @@ func console_pl011_flush
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
ldr x0, [x0, #CONSOLE_T_PL011_BASE]
ldr x0, [x0, #CONSOLE_T_BASE]
b console_pl011_core_flush
endfunc console_pl011_flush

9
include/drivers/arm/pl011.h
View file

@ -81,17 +81,10 @@
#endif /* !PL011_GENERIC_UART */
#define CONSOLE_T_PL011_BASE CONSOLE_T_DRVDATA
#ifndef __ASSEMBLER__
#include <stdint.h>
typedef struct {
console_t console;
uintptr_t base;
} console_pl011_t;
/*
* Initialize a new PL011 console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@ -99,7 +92,7 @@ typedef struct {
* Its contents will be reinitialized from scratch.
*/
int console_pl011_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
console_pl011_t *console);
console_t *console);
#endif /*__ASSEMBLER__*/

10
plat/arm/common/arm_console.c
View file

@ -16,8 +16,8 @@
/*******************************************************************************
* Functions that set up the console
******************************************************************************/
static console_pl011_t arm_boot_console;
static console_pl011_t arm_runtime_console;
static console_t arm_boot_console;
static console_t arm_runtime_console;
/* Initialize the console to provide early debug support */
void __init arm_console_boot_init(void)
@ -35,13 +35,13 @@ void __init arm_console_boot_init(void)
panic();
}
console_set_scope(&arm_boot_console.console, CONSOLE_FLAG_BOOT);
console_set_scope(&arm_boot_console, CONSOLE_FLAG_BOOT);
}
void arm_console_boot_end(void)
{
(void)console_flush();
(void)console_unregister(&arm_boot_console.console);
(void)console_unregister(&arm_boot_console);
}
/* Initialize the runtime console */
@ -54,7 +54,7 @@ void arm_console_runtime_init(void)
if (rc == 0)
panic();
console_set_scope(&arm_runtime_console.console, CONSOLE_FLAG_RUNTIME);
console_set_scope(&arm_runtime_console, CONSOLE_FLAG_RUNTIME);
}
void arm_console_runtime_end(void)

4
plat/arm/common/tsp/arm_tsp_setup.c
View file

@ -28,7 +28,7 @@
/*******************************************************************************
* Initialize the UART
******************************************************************************/
static console_pl011_t arm_tsp_runtime_console;
static console_t arm_tsp_runtime_console;
void arm_tsp_early_platform_setup(void)
{
@ -43,7 +43,7 @@ void arm_tsp_early_platform_setup(void)
if (rc == 0)
panic();
console_set_scope(&arm_tsp_runtime_console.console,
console_set_scope(&arm_tsp_runtime_console,
CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
}

2
plat/hisilicon/hikey/hikey_bl1_setup.c
View file

@ -26,7 +26,7 @@
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
static console_pl011_t console;
static console_t console;
enum {
BOOT_NORMAL = 0,

2
plat/hisilicon/hikey/hikey_bl2_setup.c
View file

@ -32,7 +32,7 @@
#define BL2_RW_BASE (BL_CODE_END)
static meminfo_t bl2_el3_tzram_layout;
static console_pl011_t console;
static console_t console;
enum {
BOOT_MODE_RECOVERY = 0,

2
plat/hisilicon/hikey/hikey_bl31_setup.c
View file

@ -27,7 +27,7 @@
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
static console_pl011_t console;
static console_t console;
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0

2
plat/hisilicon/hikey960/hikey960_bl1_setup.c
View file

@ -41,7 +41,7 @@ enum {
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
static console_pl011_t console;
static console_t console;
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0

2
plat/hisilicon/hikey960/hikey960_bl2_setup.c
View file

@ -32,7 +32,7 @@
#define BL2_RW_BASE (BL_CODE_END)
static meminfo_t bl2_el3_tzram_layout;
static console_pl011_t console;
static console_t console;
extern int load_lpm3(void);
enum {

2
plat/hisilicon/hikey960/hikey960_bl31_setup.c
View file

@ -29,7 +29,7 @@
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
static console_pl011_t console;
static console_t console;
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0

2
plat/hisilicon/hikey960/hikey960_pm.c
View file

@ -33,7 +33,7 @@
#define AXI_CONF_BASE 0x820
static unsigned int uart_base;
static console_pl011_t console;
static console_t console;
static uintptr_t hikey960_sec_entrypoint;
static void hikey960_pwr_domain_standby(plat_local_state_t cpu_state)

2
plat/hisilicon/poplar/bl1_plat_setup.c
View file

@ -28,7 +28,7 @@
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
static meminfo_t bl2_tzram_layout;
static console_pl011_t console;
static console_t console;
/*
* Cannot use default weak implementation in bl1_main.c because BL1 RW data is

2
plat/hisilicon/poplar/bl2_plat_setup.c
View file

@ -25,7 +25,7 @@
#include "plat_private.h"
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
static console_pl011_t console;
static console_t console;
/*******************************************************************************
* Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol.

2
plat/hisilicon/poplar/bl31_plat_setup.c
View file

@ -29,7 +29,7 @@
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
static console_pl011_t console;
static console_t console;
static void hisi_tzpc_sec_init(void)
{

4
plat/qemu/common/qemu_console.c
View file

@ -9,7 +9,7 @@
#include <drivers/console.h>
#include <drivers/arm/pl011.h>
static console_pl011_t console;
static console_t console;
void qemu_console_init(void)
{
@ -17,7 +17,7 @@ void qemu_console_init(void)
PLAT_QEMU_BOOT_UART_CLK_IN_HZ,
PLAT_QEMU_CONSOLE_BAUDRATE, &console);
console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
console_set_scope(&console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME);
}

5
plat/socionext/synquacer/sq_bl31_setup.c
View file

@ -16,7 +16,7 @@
#include <lib/mmio.h>
#include <sq_common.h>
static console_pl011_t console;
static console_t console;
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@ -69,8 +69,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
PLAT_SQ_BOOT_UART_CLK_IN_HZ,
SQ_CONSOLE_BAUDRATE, &console);
console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME);
console_set_scope(&console, CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
/* There are no parameters from BL2 if BL31 is a reset vector */
assert(arg0 == 0U);

4
plat/xilinx/versal/bl31_versal_setup.c
View file

@ -22,7 +22,7 @@
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
static console_pl011_t versal_runtime_console;
static console_t versal_runtime_console;
/*
* Return a pointer to the 'entry_point_info' structure of the next image for
@ -71,7 +71,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
if (rc == 0)
panic();
console_set_scope(&versal_runtime_console.console, CONSOLE_FLAG_BOOT |
console_set_scope(&versal_runtime_console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME);
/* Initialize the platform config for future decision making */