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fix: remove old-style declarations

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TF-A wants to eventually enable -Wold-style-definition globally. Convert
the rare few instances where this is still the case.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I9c450fc875cf097e6de2ed577ea3b085821c9f5e
This commit is contained in:
Boyan Karatotev 2022-11-22 14:31:41 +00:00
parent e138400d1c
commit f4b8470fee
10 changed files with 13 additions and 13 deletions
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2
drivers/nxp/ddr/nxp-ddr/ddr.c
View file

@ -269,7 +269,7 @@ static int cal_odt(const unsigned int clk,
unsigned int i; unsigned int i;
const struct dynamic_odt *pdodt = NULL; const struct dynamic_odt *pdodt = NULL;
const static struct dynamic_odt *table[2][5] = { static const struct dynamic_odt *table[2][5] = {
{single_S, single_D, NULL, NULL}, {single_S, single_D, NULL, NULL},
{dual_SS, dual_DD, NULL, NULL}, {dual_SS, dual_DD, NULL, NULL},
}; };

4
drivers/nxp/ddr/phy-gen2/messages.h
View file

@ -13,7 +13,7 @@ struct phy_msg {
const char *msg; const char *msg;
}; };
const static struct phy_msg messages_1d[] = { static const struct phy_msg messages_1d[] = {
{0x00000001, {0x00000001,
"PMU1:prbsGenCtl:%x\n" "PMU1:prbsGenCtl:%x\n"
}, },
@ -1239,7 +1239,7 @@ const static struct phy_msg messages_1d[] = {
}, },
}; };
const static struct phy_msg messages_2d[] = { static const struct phy_msg messages_2d[] = {
{0x00000001, {0x00000001,
"PMU0: Converting %d into an MR\n" "PMU0: Converting %d into an MR\n"
}, },

2
plat/imx/common/imx_sip_handler.c
View file

@ -20,7 +20,7 @@
#if defined(PLAT_imx8qm) || defined(PLAT_imx8qx) #if defined(PLAT_imx8qm) || defined(PLAT_imx8qx)
#ifdef PLAT_imx8qm #ifdef PLAT_imx8qm
const static int ap_cluster_index[PLATFORM_CLUSTER_COUNT] = { static const int ap_cluster_index[PLATFORM_CLUSTER_COUNT] = {
SC_R_A53, SC_R_A72, SC_R_A53, SC_R_A72,
}; };
#endif #endif

2
plat/imx/imx8qm/imx8qm_bl31_setup.c
View file

@ -62,7 +62,7 @@ static entry_point_info_t bl33_image_ep_info;
#error "Provide proper UART number in IMX_DEBUG_UART" #error "Provide proper UART number in IMX_DEBUG_UART"
#endif #endif
const static int imx8qm_cci_map[] = { static const int imx8qm_cci_map[] = {
CLUSTER0_CCI_SLVAE_IFACE, CLUSTER0_CCI_SLVAE_IFACE,
CLUSTER1_CCI_SLVAE_IFACE CLUSTER1_CCI_SLVAE_IFACE
}; };

2
plat/imx/imx8qm/imx8qm_psci.c
View file

@ -26,7 +26,7 @@
#define SYSTEM_PWR_STATE(state) \ #define SYSTEM_PWR_STATE(state) \
((state)->pwr_domain_state[PLAT_MAX_PWR_LVL]) ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
const static int ap_core_index[PLATFORM_CORE_COUNT] = { static const int ap_core_index[PLATFORM_CORE_COUNT] = {
SC_R_A53_0, SC_R_A53_1, SC_R_A53_2, SC_R_A53_0, SC_R_A53_1, SC_R_A53_2,
SC_R_A53_3, SC_R_A72_0, SC_R_A72_1, SC_R_A53_3, SC_R_A72_0, SC_R_A72_1,
}; };

2
plat/imx/imx8qx/imx8qx_psci.c
View file

@ -18,7 +18,7 @@
#include "../../common/sci/imx8_mu.h" #include "../../common/sci/imx8_mu.h"
const static int ap_core_index[PLATFORM_CORE_COUNT] = { static const int ap_core_index[PLATFORM_CORE_COUNT] = {
SC_R_A35_0, SC_R_A35_1, SC_R_A35_2, SC_R_A35_3 SC_R_A35_0, SC_R_A35_1, SC_R_A35_2, SC_R_A35_3
}; };

6
plat/nvidia/tegra/soc/t186/plat_memctrl.c
View file

@ -20,7 +20,7 @@ extern uint64_t tegra_bl31_phys_base;
/******************************************************************************* /*******************************************************************************
* Array to hold stream_id override config register offsets * Array to hold stream_id override config register offsets
******************************************************************************/ ******************************************************************************/
const static uint32_t tegra186_streamid_override_regs[] = { static const uint32_t tegra186_streamid_override_regs[] = {
MC_STREAMID_OVERRIDE_CFG_SDMMCRA, MC_STREAMID_OVERRIDE_CFG_SDMMCRA,
MC_STREAMID_OVERRIDE_CFG_SDMMCRAA, MC_STREAMID_OVERRIDE_CFG_SDMMCRAA,
MC_STREAMID_OVERRIDE_CFG_SDMMCR, MC_STREAMID_OVERRIDE_CFG_SDMMCR,
@ -34,7 +34,7 @@ const static uint32_t tegra186_streamid_override_regs[] = {
/******************************************************************************* /*******************************************************************************
* Array to hold the security configs for stream IDs * Array to hold the security configs for stream IDs
******************************************************************************/ ******************************************************************************/
const static mc_streamid_security_cfg_t tegra186_streamid_sec_cfgs[] = { static const mc_streamid_security_cfg_t tegra186_streamid_sec_cfgs[] = {
mc_make_sec_cfg(SCEW, NON_SECURE, NO_OVERRIDE, DISABLE), mc_make_sec_cfg(SCEW, NON_SECURE, NO_OVERRIDE, DISABLE),
mc_make_sec_cfg(AFIR, NON_SECURE, OVERRIDE, DISABLE), mc_make_sec_cfg(AFIR, NON_SECURE, OVERRIDE, DISABLE),
mc_make_sec_cfg(AFIW, NON_SECURE, OVERRIDE, DISABLE), mc_make_sec_cfg(AFIW, NON_SECURE, OVERRIDE, DISABLE),
@ -112,7 +112,7 @@ const static mc_streamid_security_cfg_t tegra186_streamid_sec_cfgs[] = {
/******************************************************************************* /*******************************************************************************
* Array to hold the transaction override configs * Array to hold the transaction override configs
******************************************************************************/ ******************************************************************************/
const static mc_txn_override_cfg_t tegra186_txn_override_cfgs[] = { static const mc_txn_override_cfg_t tegra186_txn_override_cfgs[] = {
mc_make_txn_override_cfg(BPMPW, CGID_TAG_ADR), mc_make_txn_override_cfg(BPMPW, CGID_TAG_ADR),
mc_make_txn_override_cfg(EQOSW, CGID_TAG_ADR), mc_make_txn_override_cfg(EQOSW, CGID_TAG_ADR),
mc_make_txn_override_cfg(NVJPGSWR, CGID_TAG_ADR), mc_make_txn_override_cfg(NVJPGSWR, CGID_TAG_ADR),

2
plat/xilinx/common/ipi.c
View file

@ -39,7 +39,7 @@
#define IPI_BIT_MASK(I) (ipi_table[(I)].ipi_bit_mask) #define IPI_BIT_MASK(I) (ipi_table[(I)].ipi_bit_mask)
/* IPI configuration table */ /* IPI configuration table */
const static struct ipi_config *ipi_table; static const struct ipi_config *ipi_table;
/* Total number of IPI */ /* Total number of IPI */
static uint32_t ipi_total; static uint32_t ipi_total;

2
plat/xilinx/versal/versal_ipi.c
View file

@ -19,7 +19,7 @@
#include <lib/mmio.h> #include <lib/mmio.h>
/* versal ipi configuration table */ /* versal ipi configuration table */
const static struct ipi_config versal_ipi_table[] = { static const struct ipi_config versal_ipi_table[] = {
/* A72 IPI */ /* A72 IPI */
[IPI_ID_APU] = { [IPI_ID_APU] = {
.ipi_bit_mask = IPI0_TRIG_BIT, .ipi_bit_mask = IPI0_TRIG_BIT,

2
plat/xilinx/zynqmp/zynqmp_ipi.c
View file

@ -21,7 +21,7 @@
#include <plat_private.h> #include <plat_private.h>
/* Zynqmp ipi configuration table */ /* Zynqmp ipi configuration table */
const static struct ipi_config zynqmp_ipi_table[] = { static const struct ipi_config zynqmp_ipi_table[] = {
/* APU IPI */ /* APU IPI */
{ {
.ipi_bit_mask = 0x1, .ipi_bit_mask = 0x1,