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Remove xlat_helpers.c
lib/aarch64/xlat_helpers.c defines helper functions to build translation descriptors, but no common code or upstream platform port uses them. As the rest of the xlat_tables code evolves, there may be conflicts with these helpers, therefore this code should be removed. Change-Id: I9f5be99720f929264818af33db8dada785368711
This commit is contained in:
Antonio Nino Diaz
parent
6b1ca8f358
commit
f33fbb2f97
4 changed files with 6 additions and 143 deletions
1
Makefile
1
Makefile
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@ -196,7 +196,6 @@ BL_COMMON_SOURCES += common/bl_common.c \
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common/aarch64/debug.S \
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lib/aarch64/cache_helpers.S \
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lib/aarch64/misc_helpers.S \
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lib/aarch64/xlat_helpers.c \
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lib/stdlib/abort.c \
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lib/stdlib/assert.c \
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lib/stdlib/exit.c \
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@ -76,12 +76,12 @@ either mandatory or optional.
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A platform port must enable the Memory Management Unit (MMU) as well as the
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instruction and data caches for each BL stage. Setting up the translation
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tables is the responsibility of the platform port because memory maps differ
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across platforms. A memory translation library (see `lib/aarch64/xlat_helpers.c`
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and `lib/aarch64/xlat_tables.c`) is provided to help in this setup. Note that
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although this library supports non-identity mappings, this is intended only for
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re-mapping peripheral physical addresses and allows platforms with high I/O
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addresses to reduce their virtual address space. All other addresses
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corresponding to code and data must currently use an identity mapping.
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across platforms. A memory translation library (see `lib/aarch64/xlat_tables.c`)
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is provided to help in this setup. Note that although this library supports
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non-identity mappings, this is intended only for re-mapping peripheral physical
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addresses and allows platforms with high I/O addresses to reduce their virtual
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address space. All other addresses corresponding to code and data must currently
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use an identity mapping.
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In ARM standard platforms, each BL stage configures the MMU in the
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platform-specific architecture setup function, `blX_plat_arch_setup()`, and uses
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@ -112,15 +112,6 @@ static inline void _op ## _type(uint64_t v) \
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__asm__ (#_op " " #_type ", %0" : : "r" (v)); \
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}
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/*******************************************************************************
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* Aarch64 translation tables manipulation helper prototypes
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******************************************************************************/
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uint64_t create_table_desc(uint64_t *next_table_ptr);
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uint64_t create_block_desc(uint64_t desc, uint64_t addr, uint32_t level);
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uint64_t create_device_block(uint64_t output_addr, uint32_t level, uint32_t ns);
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uint64_t create_romem_block(uint64_t output_addr, uint32_t level, uint32_t ns);
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uint64_t create_rwmem_block(uint64_t output_addr, uint32_t level, uint32_t ns);
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/*******************************************************************************
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* TLB maintenance accessor prototypes
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******************************************************************************/
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@ -1,127 +0,0 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <assert.h>
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/*******************************************************************************
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* Helper to create a level 1/2 table descriptor which points to a level 2/3
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* table.
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******************************************************************************/
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unsigned long create_table_desc(unsigned long *next_table_ptr)
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{
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unsigned long desc = (unsigned long) next_table_ptr;
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/* Clear the last 12 bits */
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desc >>= FOUR_KB_SHIFT;
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desc <<= FOUR_KB_SHIFT;
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desc |= TABLE_DESC;
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return desc;
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}
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/*******************************************************************************
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* Helper to create a level 1/2/3 block descriptor which maps the va to addr
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******************************************************************************/
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unsigned long create_block_desc(unsigned long desc,
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unsigned long addr,
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unsigned int level)
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{
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switch (level) {
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case LEVEL1:
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desc |= (addr << FIRST_LEVEL_DESC_N) | BLOCK_DESC;
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break;
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case LEVEL2:
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desc |= (addr << SECOND_LEVEL_DESC_N) | BLOCK_DESC;
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break;
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case LEVEL3:
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desc |= (addr << THIRD_LEVEL_DESC_N) | TABLE_DESC;
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break;
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default:
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assert(0);
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}
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return desc;
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}
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/*******************************************************************************
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* Helper to create a level 1/2/3 block descriptor which maps the va to output_
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* addr with Device nGnRE attributes.
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******************************************************************************/
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unsigned long create_device_block(unsigned long output_addr,
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unsigned int level,
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unsigned int ns)
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{
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unsigned long upper_attrs, lower_attrs, desc;
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lower_attrs = LOWER_ATTRS(ACCESS_FLAG | OSH | AP_RW);
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lower_attrs |= LOWER_ATTRS(ns | ATTR_DEVICE_INDEX);
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upper_attrs = UPPER_ATTRS(XN);
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desc = upper_attrs | lower_attrs;
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return create_block_desc(desc, output_addr, level);
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}
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/*******************************************************************************
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* Helper to create a level 1/2/3 block descriptor which maps the va to output_
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* addr with inner-shareable normal wbwa read-only memory attributes.
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******************************************************************************/
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unsigned long create_romem_block(unsigned long output_addr,
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unsigned int level,
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unsigned int ns)
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{
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unsigned long upper_attrs, lower_attrs, desc;
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lower_attrs = LOWER_ATTRS(ACCESS_FLAG | ISH | AP_RO);
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lower_attrs |= LOWER_ATTRS(ns | ATTR_IWBWA_OWBWA_NTR_INDEX);
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upper_attrs = UPPER_ATTRS(0ull);
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desc = upper_attrs | lower_attrs;
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return create_block_desc(desc, output_addr, level);
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}
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/*******************************************************************************
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* Helper to create a level 1/2/3 block descriptor which maps the va to output_
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* addr with inner-shareable normal wbwa read-write memory attributes.
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******************************************************************************/
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unsigned long create_rwmem_block(unsigned long output_addr,
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unsigned int level,
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unsigned int ns)
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{
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unsigned long upper_attrs, lower_attrs, desc;
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lower_attrs = LOWER_ATTRS(ACCESS_FLAG | ISH | AP_RW);
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lower_attrs |= LOWER_ATTRS(ns | ATTR_IWBWA_OWBWA_NTR_INDEX);
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upper_attrs = UPPER_ATTRS(XN);
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desc = upper_attrs | lower_attrs;
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return create_block_desc(desc, output_addr, level);
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}
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