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docs(allwinner): update SoC list and build options
Our list of possible Allwinner build targets was missing the newly introduced R329 support. Fix that by adding a table with maps the SoC names to the build target names. Also add some explanation about the recently introduced PSCI power management providers. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: Icf5e304562c3082552bf08d7b26904caf9074936
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@ -8,23 +8,33 @@ PSCI runtime services.
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Building TF-A
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Building TF-A
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-------------
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-------------
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To build for machines with an A64 or H5 SoC:
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There is one build target per supported SoC:
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+------+-------------------+
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| SoC | TF-A build target |
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+======+===================+
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| A64 | sun50i_a64 |
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+------+-------------------+
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| H5 | sun50i_a64 |
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+------+-------------------+
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| H6 | sun50i_h6 |
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+------+-------------------+
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| H616 | sun50i_h616 |
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+------+-------------------+
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| H313 | sun50i_h616 |
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+------+-------------------+
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| R329 | sun50i_r329 |
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+------+-------------------+
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To build with the default settings for a particular SoC:
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.. code:: shell
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.. code:: shell
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make CROSS_COMPILE=aarch64-linux-gnu- PLAT=sun50i_a64 DEBUG=1 bl31
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make CROSS_COMPILE=aarch64-linux-gnu- PLAT=<build target> DEBUG=1
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To build for machines with an H6 SoC:
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So for instance to build for a board with the Allwinner A64 SoC::
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.. code:: shell
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make CROSS_COMPILE=aarch64-linux-gnu- PLAT=sun50i_a64 DEBUG=1
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make CROSS_COMPILE=aarch64-linux-gnu- PLAT=sun50i_h6 DEBUG=1 bl31
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To build for machines with an H616 or H313 SoC:
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.. code:: shell
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make CROSS_COMPILE=aarch64-linux-gnu- PLAT=sun50i_h616 DEBUG=1 bl31
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Platform-specific build options
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Platform-specific build options
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@ -33,6 +43,23 @@ The default build options should generate a working firmware image. There are
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some build options that allow to fine-tune the firmware, or to disable support
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some build options that allow to fine-tune the firmware, or to disable support
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for optional features.
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for optional features.
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- ``SUNXI_PSCI_USE_NATIVE`` : Support direct control of the CPU cores powerdown
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and powerup sequence by BL31. This requires either support for a code snippet
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to be loaded into the ARISC SCP (A64, H5), or the power sequence control
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registers to be programmed directly (H6, H616). This supports only basic
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control, like core on/off and system off/reset.
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This option defaults to 1. If an active SCP supporting the SCPI protocol
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is detected at runtime, this control scheme will be ignored, and SCPI
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will be used instead, unless support has been explicitly disabled.
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- ``SUNXI_PSCI_USE_SCPI`` : Support control of the CPU cores powerdown and
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powerup sequence by talking to the SCP processor via the SCPI protocol.
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This allows more advanced power saving techniques, like suspend to RAM.
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This option defaults to 1 on SoCs that feature an SCP. If no SCP firmware
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using the SCPI protocol is detected, the native sequence will be used
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instead. If both native and SCPI methods are included, SCPI will be favoured
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if SCP support is detected.
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- ``SUNXI_SETUP_REGULATORS`` : On SoCs that typically ship with a PMIC
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- ``SUNXI_SETUP_REGULATORS`` : On SoCs that typically ship with a PMIC
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power management controller, BL31 tries to set up all needed power rails,
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power management controller, BL31 tries to set up all needed power rails,
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programming them to their respective voltages. That allows bootloader
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programming them to their respective voltages. That allows bootloader
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