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feat(imx8m): add 3600 MTps DDR PLL rate

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Add 3600 MTps DRAM and its 900 MHz PLL setting M=300 P=8 S=0 , so
24 MHz * 300 / 8 / 2^0 = 900 MHz ~ 3600 MTps (x4) .

Signed-off-by: Marek Vasut <marex@denx.de>
Change-Id: If2743827294efc0f981718f04b772cc462846195
This commit is contained in:
Marek Vasut 2023-11-30 22:18:49 +01:00
parent 060fe63337
commit f1bb459c31
1 changed files with 3 additions and 0 deletions
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3
plat/imx/imx8m/ddr/clock.c
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@ -96,6 +96,9 @@ void dram_pll_init(unsigned int drate)
case 3732: case 3732:
mmio_write_32(DRAM_PLL_CTRL + 0x4, (311 << 12) | (4 << 4) | 1); mmio_write_32(DRAM_PLL_CTRL + 0x4, (311 << 12) | (4 << 4) | 1);
break; break;
case 3600:
mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (8 << 4) | 0);
break;
case 3200: case 3200:
mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (9 << 4) | 0); mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (9 << 4) | 0);
break; break;