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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge pull request #885 from antonio-nino-diaz-arm/an/console-flush
Implement console_flush()
This commit is contained in:
commit
f07d3985b8
25 changed files with 319 additions and 30 deletions
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@ -34,6 +34,7 @@
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#include <auth_mod.h>
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#include <bl1.h>
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#include <bl_common.h>
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#include <console.h>
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#include <debug.h>
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#include <errata_report.h>
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#include <platform.h>
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@ -166,6 +167,8 @@ void bl1_main(void)
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NOTICE("BL1-FWU: *******FWU Process Started*******\n");
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bl1_prepare_next_image(image_id);
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console_flush();
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}
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/*******************************************************************************
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -32,6 +32,7 @@
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#include <auth_mod.h>
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#include <bl1.h>
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#include <bl_common.h>
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#include <console.h>
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#include <debug.h>
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#include <platform.h>
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#include "bl2_private.h"
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@ -69,6 +70,8 @@ void bl2_main(void)
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disable_mmu_icache_secure();
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#endif /* AARCH32 */
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console_flush();
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/*
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* Run next BL image via an SMC to BL1. Information on how to pass
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* control to the BL32 (if present) and BL33 software images will
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -34,6 +34,7 @@
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#include <auth_mod.h>
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#include <bl_common.h>
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#include <bl1.h>
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#include <console.h>
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#include <debug.h>
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#include <platform.h>
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#include <platform_def.h>
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@ -63,6 +64,8 @@ void bl2u_main(void)
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/* Perform platform setup in BL2U after loading SCP_BL2U */
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bl2u_platform_setup();
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console_flush();
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/*
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* Indicate that BL2U is done and resume back to
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* normal world via an SMC to BL1.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -349,6 +349,8 @@ func do_crash_reporting
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/* Print some platform registers */
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plat_crash_print_regs
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bl plat_crash_console_flush
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/* Done reporting */
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no_ret plat_panic_handler
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endfunc do_crash_reporting
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -33,6 +33,7 @@
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#include <assert.h>
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#include <bl_common.h>
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#include <bl31.h>
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#include <console.h>
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#include <context_mgmt.h>
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#include <debug.h>
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#include <platform.h>
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@ -129,6 +130,8 @@ void bl31_main(void)
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*/
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bl31_prepare_next_image_entry();
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console_flush();
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/*
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* Perform any platform specific runtime setup prior to cold boot exit
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* from BL31
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -70,9 +70,12 @@ func do_panic
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/* Print new line */
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ldr r4, =panic_end
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bl asm_print_str
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bl plat_crash_console_flush
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1:
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mov lr, r6
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b plat_panic_handler
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no_ret plat_panic_handler
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endfunc do_panic
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/***********************************************************
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@ -140,6 +143,9 @@ dec_print_loop:
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udiv r5, r5, r6 /* Reduce divisor */
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cmp r5, #0
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bne dec_print_loop
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bl plat_crash_console_flush
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1:
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no_ret plat_panic_handler
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endfunc asm_assert
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -96,8 +96,9 @@ func asm_assert
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b.ne _assert_loop
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mov x4, x6
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asm_print_line_dec
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bl plat_crash_console_flush
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_assert_loop:
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b _assert_loop
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no_ret plat_panic_handler
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endfunc asm_assert
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#endif
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@ -187,6 +188,8 @@ el3_panic:
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sub x4, x4, #4
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bl asm_print_hex
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bl plat_crash_console_flush
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_panic_handler:
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/* Pass to plat_panic_handler the address from where el3_panic was
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* called, not the address of the call from el3_panic. */
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@ -2242,6 +2242,17 @@ designated crash console. It must only use general purpose registers x1 and
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x2 to do its work. The parameter and the return value are in general purpose
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register x0.
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### Function : plat_crash_console_flush
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Argument : void
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Return : int
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This API is used by the crash reporting mechanism to force write of all buffered
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data on the designated crash console. It should only use general purpose
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registers x0 and x1 to do its work. The return value is 0 on successful
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completion; otherwise the return value is -1.
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4. Build flags
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---------------
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -40,6 +40,7 @@
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.globl console_core_init
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.globl console_core_putc
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.globl console_core_getc
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.globl console_core_flush
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/* -----------------------------------------------
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@ -158,3 +159,29 @@ getc_error:
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mov r0, #-1
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bx lr
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endfunc console_core_getc
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/* ---------------------------------------------
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* int console_core_flush(uintptr_t base_addr)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* In : r0 - console base address
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* Out : return -1 on error else return 0.
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* Clobber list : r0, r1
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* ---------------------------------------------
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*/
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func console_core_flush
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cmp r0, #0
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beq flush_error
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1:
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/* Loop while the transmit FIFO is busy */
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ldr r1, [r0, #UARTFR]
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tst r1, #PL011_UARTFR_BUSY
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bne 1b
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mov r0, #0
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bx lr
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flush_error:
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mov r0, #-1
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bx lr
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endfunc console_core_flush
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -41,6 +41,7 @@
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.globl console_core_init
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.globl console_core_putc
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.globl console_core_getc
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.globl console_core_flush
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/* -----------------------------------------------
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@ -151,3 +152,27 @@ getc_error:
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mov w0, #-1
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ret
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endfunc console_core_getc
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/* ---------------------------------------------
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* int console_core_flush(uintptr_t base_addr)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* In : x0 - console base address
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* Out : return -1 on error else return 0.
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func console_core_flush
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cbz x0, flush_error
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1:
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/* Loop until the transmit FIFO is empty */
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ldr w1, [x0, #UARTFR]
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tbnz w1, #PL011_UARTFR_BUSY_BIT, 1b
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mov w0, #0
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ret
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flush_error:
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mov w0, #-1
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ret
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endfunc console_core_flush
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -31,9 +31,10 @@
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#include <asm_macros.S>
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#include <cadence/cdns_uart.h>
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.globl console_core_init
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.globl console_core_putc
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.globl console_core_getc
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.globl console_core_init
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.globl console_core_putc
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.globl console_core_getc
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.globl console_core_flush
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/* -----------------------------------------------
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* int console_core_init(unsigned long base_addr,
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@ -125,3 +126,18 @@ getc_error:
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mov w0, #-1
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ret
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endfunc console_core_getc
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/* ---------------------------------------------
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* int console_core_flush(uintptr_t base_addr)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* In : x0 - console base address
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* Out : return -1 on error else return 0.
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func console_core_flush
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/* Placeholder */
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mov w0, #0
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ret
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endfunc console_core_flush
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
|
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -33,6 +33,7 @@
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.globl console_uninit
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.globl console_putc
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.globl console_getc
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.globl console_flush
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/*
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* The console base is in the data section and not in .bss
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@ -112,3 +113,18 @@ func console_getc
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ldr r0, [r1]
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b console_core_getc
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endfunc console_getc
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/* ---------------------------------------------
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* int console_flush(void)
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* Function to force a write of all buffered
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* data that hasn't been output. It returns 0
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* upon successful completion, otherwise it
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* returns -1.
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* Clobber list : r0, r1
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* ---------------------------------------------
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*/
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func console_flush
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ldr r1, =console_base
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ldr r0, [r1]
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b console_core_flush
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endfunc console_flush
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|
|
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
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|
@ -38,6 +38,7 @@
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.globl console_core_init
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.globl console_core_putc
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.globl console_core_getc
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.globl console_core_flush
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/* -----------------------------------------------
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* int console_core_init(uintptr_t base_addr,
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@ -109,3 +110,23 @@ getc_error:
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mov r0, #-1
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bx lr
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endfunc console_core_getc
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/* ---------------------------------------------
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* int console_core_flush(uintptr_t base_addr)
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* Function to force a write of all buffered
|
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* data that hasn't been output.
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* In : r0 - console base address
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* Out : return -1 on error else return 0.
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* Clobber list : r0, r1
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* ---------------------------------------------
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*/
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func console_core_flush
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cmp r0, #0
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beq flush_error
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/* Insert implementation here */
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mov r0, #0
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bx lr
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flush_error:
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mov r0, #-1
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bx lr
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endfunc console_core_flush
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|
|
|
@ -1,5 +1,5 @@
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/*
|
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
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|
@ -33,6 +33,7 @@
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.globl console_uninit
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.globl console_putc
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.globl console_getc
|
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.globl console_flush
|
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|
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/*
|
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* The console base is in the data section and not in .bss
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|
@ -111,3 +112,18 @@ func console_getc
|
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ldr x0, [x1, :lo12:console_base]
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b console_core_getc
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endfunc console_getc
|
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|
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/* ---------------------------------------------
|
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* int console_flush(void)
|
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* Function to force a write of all buffered
|
||||
* data that hasn't been output. It returns 0
|
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* upon successful completion, otherwise it
|
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* returns -1.
|
||||
* Clobber list : x0, x1
|
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* ---------------------------------------------
|
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*/
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func console_flush
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adrp x1, console_base
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ldr x0, [x1, :lo12:console_base]
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b console_core_flush
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endfunc console_flush
|
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|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -38,6 +38,7 @@
|
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.globl console_core_init
|
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.globl console_core_putc
|
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.globl console_core_getc
|
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.globl console_core_flush
|
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|
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/* -----------------------------------------------
|
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* int console_core_init(uintptr_t base_addr,
|
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|
@ -104,3 +105,22 @@ getc_error:
|
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mov w0, #-1
|
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ret
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endfunc console_core_getc
|
||||
|
||||
/* ---------------------------------------------
|
||||
* int console_core_flush(uintptr_t base_addr)
|
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* Function to force a write of all buffered
|
||||
* data that hasn't been output.
|
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* In : x0 - console base address
|
||||
* Out : return -1 on error else return 0.
|
||||
* Clobber list : x0, x1
|
||||
* ---------------------------------------------
|
||||
*/
|
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func console_core_flush
|
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cbz x0, flush_error
|
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/* Insert implementation here */
|
||||
mov w0, #0
|
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ret
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flush_error:
|
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mov w0, #-1
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ret
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||||
endfunc console_core_flush
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -35,6 +35,7 @@
|
|||
.globl console_core_init
|
||||
.globl console_core_putc
|
||||
.globl console_core_getc
|
||||
.globl console_core_flush
|
||||
|
||||
/* -----------------------------------------------
|
||||
* int console_core_init(unsigned long base_addr,
|
||||
|
@ -153,3 +154,18 @@ getc_error:
|
|||
mov w0, #-1
|
||||
ret
|
||||
endfunc console_core_getc
|
||||
|
||||
/* ---------------------------------------------
|
||||
* int console_core_flush(uintptr_t base_addr)
|
||||
* Function to force a write of all buffered
|
||||
* data that hasn't been output.
|
||||
* In : x0 - console base address
|
||||
* Out : return -1 on error else return 0.
|
||||
* Clobber list : x0, x1
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
func console_core_flush
|
||||
/* Placeholder */
|
||||
mov w0, #0
|
||||
ret
|
||||
endfunc console_core_flush
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -38,6 +38,7 @@ int console_init(uintptr_t base_addr,
|
|||
void console_uninit(void);
|
||||
int console_putc(int c);
|
||||
int console_getc(void);
|
||||
int console_flush(void);
|
||||
|
||||
#endif /* __CONSOLE_H__ */
|
||||
|
||||
|
|
|
@ -100,6 +100,7 @@ uintptr_t plat_get_my_stack(void);
|
|||
void plat_report_exception(unsigned int exception_type);
|
||||
int plat_crash_console_init(void);
|
||||
int plat_crash_console_putc(int c);
|
||||
int plat_crash_console_flush(void);
|
||||
void plat_error_handler(int err) __dead2;
|
||||
void plat_panic_handler(void) __dead2;
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -31,6 +31,7 @@
|
|||
#include <stddef.h>
|
||||
#include <arch_helpers.h>
|
||||
#include <assert.h>
|
||||
#include <console.h>
|
||||
#include <debug.h>
|
||||
#include <platform.h>
|
||||
#include "psci_private.h"
|
||||
|
@ -46,6 +47,8 @@ void psci_system_off(void)
|
|||
psci_spd_pm->svc_system_off();
|
||||
}
|
||||
|
||||
console_flush();
|
||||
|
||||
/* Call the platform specific hook */
|
||||
psci_plat_pm_ops->system_off();
|
||||
|
||||
|
@ -63,6 +66,8 @@ void psci_system_reset(void)
|
|||
psci_spd_pm->svc_system_reset();
|
||||
}
|
||||
|
||||
console_flush();
|
||||
|
||||
/* Call the platform specific hook */
|
||||
psci_plat_pm_ops->system_reset();
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -28,7 +28,9 @@
|
|||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <console.h>
|
||||
#include <debug.h>
|
||||
#include <platform.h>
|
||||
|
||||
/*
|
||||
* This is a basic implementation. This could be improved.
|
||||
|
@ -37,5 +39,8 @@ void __assert (const char *function, const char *file, unsigned int line,
|
|||
const char *assertion)
|
||||
{
|
||||
tf_printf("ASSERT: %s <%d> : %s\n", function, line, assertion);
|
||||
while(1);
|
||||
|
||||
console_flush();
|
||||
|
||||
plat_panic_handler();
|
||||
}
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -31,9 +31,10 @@
|
|||
#include <platform_def.h>
|
||||
|
||||
.weak plat_arm_calc_core_pos
|
||||
.weak plat_crash_console_init
|
||||
.weak plat_crash_console_putc
|
||||
.weak plat_my_core_pos
|
||||
.globl plat_crash_console_init
|
||||
.globl plat_crash_console_putc
|
||||
.globl plat_crash_console_flush
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* unsigned int plat_my_core_pos(void)
|
||||
|
@ -85,3 +86,16 @@ func plat_crash_console_putc
|
|||
ldr r1, =PLAT_ARM_CRASH_UART_BASE
|
||||
b console_core_putc
|
||||
endfunc plat_crash_console_putc
|
||||
|
||||
/* ---------------------------------------------
|
||||
* int plat_crash_console_flush()
|
||||
* Function to force a write of all buffered
|
||||
* data that hasn't been output.
|
||||
* Out : return -1 on error else return 0.
|
||||
* Clobber list : r0 - r1
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
func plat_crash_console_flush
|
||||
ldr r1, =PLAT_ARM_CRASH_UART_BASE
|
||||
b console_core_flush
|
||||
endfunc plat_crash_console_flush
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -34,6 +34,7 @@
|
|||
.weak plat_my_core_pos
|
||||
.globl plat_crash_console_init
|
||||
.globl plat_crash_console_putc
|
||||
.globl plat_crash_console_flush
|
||||
.globl platform_mem_init
|
||||
|
||||
|
||||
|
@ -88,6 +89,19 @@ func plat_crash_console_putc
|
|||
b console_core_putc
|
||||
endfunc plat_crash_console_putc
|
||||
|
||||
/* ---------------------------------------------
|
||||
* int plat_crash_console_flush()
|
||||
* Function to force a write of all buffered
|
||||
* data that hasn't been output.
|
||||
* Out : return -1 on error else return 0.
|
||||
* Clobber list : r0 - r1
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
func plat_crash_console_flush
|
||||
mov_imm x1, PLAT_ARM_CRASH_UART_BASE
|
||||
b console_core_flush
|
||||
endfunc plat_crash_console_flush
|
||||
|
||||
/* ---------------------------------------------------------------------
|
||||
* We don't need to carry out any memory initialization on ARM
|
||||
* platforms. The Secure RAM is accessible straight away.
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -31,11 +31,43 @@
|
|||
#include <arch.h>
|
||||
#include <asm_macros.S>
|
||||
|
||||
.weak plat_crash_console_init
|
||||
.weak plat_crash_console_putc
|
||||
.weak plat_crash_console_flush
|
||||
.weak plat_reset_handler
|
||||
.weak plat_disable_acp
|
||||
.weak platform_mem_init
|
||||
.weak plat_panic_handler
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Placeholder function which should be redefined by
|
||||
* each platform.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func plat_crash_console_init
|
||||
mov r0, #0
|
||||
bx lr
|
||||
endfunc plat_crash_console_init
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Placeholder function which should be redefined by
|
||||
* each platform.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func plat_crash_console_putc
|
||||
bx lr
|
||||
endfunc plat_crash_console_putc
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Placeholder function which should be redefined by
|
||||
* each platform.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func plat_crash_console_flush
|
||||
mov r0, #0
|
||||
bx lr
|
||||
endfunc plat_crash_console_flush
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Placeholder function which should be redefined by
|
||||
* each platform.
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -35,6 +35,7 @@
|
|||
.weak plat_report_exception
|
||||
.weak plat_crash_console_init
|
||||
.weak plat_crash_console_putc
|
||||
.weak plat_crash_console_flush
|
||||
.weak plat_reset_handler
|
||||
.weak plat_disable_acp
|
||||
.weak bl1_plat_prepare_exit
|
||||
|
@ -96,6 +97,15 @@ func plat_crash_console_putc
|
|||
ret
|
||||
endfunc plat_crash_console_putc
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Placeholder function which should be redefined by
|
||||
* each platform.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func plat_crash_console_flush
|
||||
ret
|
||||
endfunc plat_crash_console_flush
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Placeholder function which should be redefined by
|
||||
* each platform. This function should preserve x19 - x29.
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -33,6 +33,7 @@
|
|||
.globl console_core_init
|
||||
.globl console_core_putc
|
||||
.globl console_core_getc
|
||||
.globl console_core_flush
|
||||
|
||||
/* -----------------------------------------------
|
||||
* int console_core_init(unsigned long base_addr,
|
||||
|
@ -170,3 +171,18 @@ getc_error:
|
|||
mov w0, #-1
|
||||
ret
|
||||
endfunc console_core_getc
|
||||
|
||||
/* ---------------------------------------------
|
||||
* int console_core_flush(uintptr_t base_addr)
|
||||
* Function to force a write of all buffered
|
||||
* data that hasn't been output.
|
||||
* In : x0 - console base address
|
||||
* Out : return -1 on error else return 0.
|
||||
* Clobber list : x0, x1
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
func console_core_flush
|
||||
/* Placeholder */
|
||||
mov w0, #0
|
||||
ret
|
||||
endfunc console_core_flush
|
||||
|
|
Loading…
Add table
Reference in a new issue