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feat(spmc): enable the SPMC to pass the linear core ID in a register

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Add TF-A implementation defined behaviour to provide the linear core
ID in the x4 register when bringing up an SP.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I6cb215841097b264d252ec0262b0b7272be99d41
This commit is contained in:
Marc Bonnici 2021-12-15 18:00:50 +00:00
parent f0c25a082f
commit f0143004e5
1 changed files with 6 additions and 0 deletions
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6
services/std_svc/spm/el3_spmc/spmc_setup.c
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@ -43,6 +43,12 @@ void spmc_el1_sp_setup(struct secure_partition_desc *sp,
ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
DISABLE_ALL_EXCEPTIONS);
/*
* TF-A Implementation defined behaviour to provide the linear
* core ID in the x4 register.
*/
ep_info->args.arg4 = (uintptr_t) plat_my_core_pos();
/*
* Check whether setup is being performed for the primary or a secondary
* execution context. In the latter case, indicate to the SP that this