From eba319be6c64cbe1280b49e14c30de68ed0020ab Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 3 Feb 2020 19:46:15 +0900 Subject: [PATCH] uniphier: make I/O register region configurable The I/O register region will be changed in the next SoC. Make it configurable. Change-Id: Iec0cbd1ef2d0703ebc7c3d3082edd73791bbfec9 Signed-off-by: Masahiro Yamada --- .../uniphier/tsp/uniphier_tsp_setup.c | 2 +- plat/socionext/uniphier/uniphier.h | 2 +- plat/socionext/uniphier/uniphier_bl2_setup.c | 2 +- plat/socionext/uniphier/uniphier_bl31_setup.c | 2 +- plat/socionext/uniphier/uniphier_xlat_setup.c | 33 ++++++++++++++++--- 5 files changed, 32 insertions(+), 9 deletions(-) diff --git a/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c index 5ea6e9474..091a6f7a9 100644 --- a/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c +++ b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c @@ -31,6 +31,6 @@ void tsp_platform_setup(void) void tsp_plat_arch_setup(void) { - uniphier_mmap_setup(); + uniphier_mmap_setup(uniphier_soc); enable_mmu_el1(0); } diff --git a/plat/socionext/uniphier/uniphier.h b/plat/socionext/uniphier/uniphier.h index b26bd65d2..ee520ad23 100644 --- a/plat/socionext/uniphier/uniphier.h +++ b/plat/socionext/uniphier/uniphier.h @@ -57,7 +57,7 @@ void uniphier_scp_open_com(void); void uniphier_scp_system_off(void); void uniphier_scp_system_reset(void); -void uniphier_mmap_setup(void); +void uniphier_mmap_setup(unsigned int soc); void uniphier_cci_init(unsigned int soc); void uniphier_cci_enable(void); diff --git a/plat/socionext/uniphier/uniphier_bl2_setup.c b/plat/socionext/uniphier/uniphier_bl2_setup.c index 9c8d2daad..7a7f78681 100644 --- a/plat/socionext/uniphier/uniphier_bl2_setup.c +++ b/plat/socionext/uniphier/uniphier_bl2_setup.c @@ -43,7 +43,7 @@ void bl2_el3_plat_arch_setup(void) int skip_scp = 0; int ret; - uniphier_mmap_setup(); + uniphier_mmap_setup(uniphier_soc); enable_mmu_el3(0); /* add relocation offset (run-time-address - link-address) */ diff --git a/plat/socionext/uniphier/uniphier_bl31_setup.c b/plat/socionext/uniphier/uniphier_bl31_setup.c index 15ceed4bb..f2f0b298a 100644 --- a/plat/socionext/uniphier/uniphier_bl31_setup.c +++ b/plat/socionext/uniphier/uniphier_bl31_setup.c @@ -86,6 +86,6 @@ void bl31_platform_setup(void) void bl31_plat_arch_setup(void) { - uniphier_mmap_setup(); + uniphier_mmap_setup(uniphier_soc); enable_mmu_el3(0); } diff --git a/plat/socionext/uniphier/uniphier_xlat_setup.c b/plat/socionext/uniphier/uniphier_xlat_setup.c index 18d2f9e93..66c7834f5 100644 --- a/plat/socionext/uniphier/uniphier_xlat_setup.c +++ b/plat/socionext/uniphier/uniphier_xlat_setup.c @@ -4,15 +4,36 @@ * SPDX-License-Identifier: BSD-3-Clause */ +#include + #include #include #include -#define UNIPHIER_REG_REGION_BASE 0x50000000ULL -#define UNIPHIER_REG_REGION_SIZE 0x20000000ULL +#include "uniphier.h" -void uniphier_mmap_setup(void) +struct uniphier_reg_region { + uintptr_t base; + size_t size; +}; + +static const struct uniphier_reg_region uniphier_reg_region[] = { + [UNIPHIER_SOC_LD11] = { + .base = 0x50000000UL, + .size = 0x20000000UL, + }, + [UNIPHIER_SOC_LD20] = { + .base = 0x50000000UL, + .size = 0x20000000UL, + }, + [UNIPHIER_SOC_PXS3] = { + .base = 0x50000000UL, + .size = 0x20000000UL, + }, +}; + +void uniphier_mmap_setup(unsigned int soc) { VERBOSE("Trusted RAM seen by this BL image: %p - %p\n", (void *)BL_CODE_BASE, (void *)BL_END); @@ -35,8 +56,10 @@ void uniphier_mmap_setup(void) MT_DEVICE | MT_RW | MT_SECURE); /* register region */ - mmap_add_region(UNIPHIER_REG_REGION_BASE, UNIPHIER_REG_REGION_BASE, - UNIPHIER_REG_REGION_SIZE, + assert(soc < ARRAY_SIZE(uniphier_reg_region)); + mmap_add_region(uniphier_reg_region[soc].base, + uniphier_reg_region[soc].base, + uniphier_reg_region[soc].size, MT_DEVICE | MT_RW | MT_SECURE); init_xlat_tables();