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Merge "refactor(cm): update SCTLR_EL2 initialisation" into integration
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commit
eb408432e5
1 changed files with 8 additions and 15 deletions
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@ -261,13 +261,9 @@ static void setup_ns_context(cpu_context_t *ctx, const struct entry_point_info *
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#if CTX_INCLUDE_EL2_REGS
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/*
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* Initialize SCTLR_EL2 context register using Endianness value
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* taken from the entrypoint attribute.
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* Initialize SCTLR_EL2 context register with reset value.
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*/
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u_register_t sctlr_el2_val = (EP_GET_EE(ep->h.attr) != 0U) ? SCTLR_EE_BIT : 0UL;
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sctlr_el2_val |= SCTLR_EL2_RES1;
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write_el2_ctx_common(get_el2_sysregs_ctx(ctx), sctlr_el2, sctlr_el2_val);
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write_el2_ctx_common(get_el2_sysregs_ctx(ctx), sctlr_el2, SCTLR_EL2_RES1);
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if (is_feat_hcx_supported()) {
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/*
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@ -952,7 +948,7 @@ static void init_nonsecure_el2_unused(cpu_context_t *ctx)
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******************************************************************************/
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void cm_prepare_el3_exit(uint32_t security_state)
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{
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u_register_t sctlr_elx, scr_el3;
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u_register_t sctlr_el2, scr_el3;
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cpu_context_t *ctx = cm_get_context(security_state);
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assert(ctx != NULL);
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@ -993,20 +989,17 @@ void cm_prepare_el3_exit(uint32_t security_state)
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/* Condition to ensure EL2 is being used. */
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if ((scr_el3 & SCR_HCE_BIT) != 0U) {
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/* Use SCTLR_EL1.EE value to initialise sctlr_el2 */
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sctlr_elx = read_ctx_reg(get_el1_sysregs_ctx(ctx),
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CTX_SCTLR_EL1);
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sctlr_elx &= SCTLR_EE_BIT;
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sctlr_elx |= SCTLR_EL2_RES1;
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/* Initialize SCTLR_EL2 register with reset value. */
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sctlr_el2 = SCTLR_EL2_RES1;
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#if ERRATA_A75_764081
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/*
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* If workaround of errata 764081 for Cortex-A75
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* is used then set SCTLR_EL2.IESB to enable
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* Implicit Error Synchronization Barrier.
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*/
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sctlr_elx |= SCTLR_IESB_BIT;
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#endif /* ERRATA_A75_764081 */
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write_sctlr_el2(sctlr_elx);
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sctlr_el2 |= SCTLR_IESB_BIT;
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#endif
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write_sctlr_el2(sctlr_el2);
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} else {
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/*
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* (scr_el3 & SCR_HCE_BIT==0)
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