diff --git a/plat/amd/common/include/plat_xfer_list.h b/plat/amd/common/include/plat_xfer_list.h index bf9f4589d..24a9c0c51 100644 --- a/plat/amd/common/include/plat_xfer_list.h +++ b/plat/amd/common/include/plat_xfer_list.h @@ -12,4 +12,7 @@ int32_t transfer_list_populate_ep_info(entry_point_info_t *bl32, entry_point_info_t *bl33); +void *transfer_list_retrieve_dt_address(void); +bool populate_data_from_xfer_list(void); + #endif /* PLAT_XFER_LIST_H */ diff --git a/plat/amd/common/plat_fdt.c b/plat/amd/common/plat_fdt.c new file mode 100644 index 000000000..e72c0dd22 --- /dev/null +++ b/plat/amd/common/plat_fdt.c @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#include +#include +#include +#include +#include + +#include +#include + +#define FIT_CONFS_PATH "/configurations" + +static bool is_fit_image(void *dtb) +{ + int64_t confs_noffset = 0; + bool status = true; + + confs_noffset = fdt_path_offset(dtb, FIT_CONFS_PATH); + + /* confs_noffset is only present on FIT image */ + if (confs_noffset < 0) { + status = false; + } + + return status; +} + +int32_t is_valid_dtb(void *fdt) +{ + int32_t ret = 0; + + ret = fdt_check_header(fdt); + if (ret != 0) { + ERROR("Can't read DT at %p\n", fdt); + goto error; + } + + ret = fdt_open_into(fdt, fdt, XILINX_OF_BOARD_DTB_MAX_SIZE); + if (ret < 0) { + ERROR("Invalid Device Tree at %p: error %d\n", fdt, ret); + goto error; + } + + if (is_fit_image(fdt)) { + WARN("FIT image detected, TF-A will not update DTB for DDR address space\n"); + ret = -FDT_ERR_NOTFOUND; + } +error: + return ret; +} + +/* TODO: Reserve TFA memory in DT through custom TL entry */ +void prepare_dtb(void) +{ + +} + +uintptr_t plat_retrieve_dt_addr(void) +{ + void *dtb = NULL; + + dtb = transfer_list_retrieve_dt_address(); + if (dtb == NULL) { + WARN("TL header or DT entry is invalid\n"); + } + + return (uintptr_t)dtb; +} diff --git a/plat/amd/common/plat_xfer_list.c b/plat/amd/common/plat_xfer_list.c index 07829c216..36c87ca34 100644 --- a/plat/amd/common/plat_xfer_list.c +++ b/plat/amd/common/plat_xfer_list.c @@ -7,26 +7,34 @@ #include #include #include +#include -/* - * FIXME: This address should come from firmware before TF-A runs - * Having this to make sure the transfer list functionality works - */ -#define FW_HANDOFF_BASE U(0x1200000) -#define FW_HANDOFF_SIZE U(0x600000) static struct transfer_list_header *tl_hdr; +static int32_t tl_ops_holder; + +bool populate_data_from_xfer_list(void) +{ + bool ret = true; + + tl_hdr = (struct transfer_list_header *)FW_HANDOFF_BASE; + tl_ops_holder = transfer_list_check_header(tl_hdr); + + if ((tl_ops_holder != TL_OPS_ALL) && (tl_ops_holder != TL_OPS_RO)) { + ret = false; + } + + return ret; +} int32_t transfer_list_populate_ep_info(entry_point_info_t *bl32, entry_point_info_t *bl33) { + int32_t ret = tl_ops_holder; struct transfer_list_entry *te = NULL; - struct entry_point_info *ep; - int32_t ret; + struct entry_point_info *ep = NULL; - tl_hdr = (struct transfer_list_header *)FW_HANDOFF_BASE; - ret = transfer_list_check_header(tl_hdr); - if ((ret == TL_OPS_ALL) || (ret == TL_OPS_RO)) { + if ((tl_ops_holder == TL_OPS_ALL) || (tl_ops_holder == TL_OPS_RO)) { transfer_list_dump(tl_hdr); while ((te = transfer_list_next(tl_hdr, te)) != NULL) { ep = transfer_list_entry_data(te); @@ -46,5 +54,21 @@ int32_t transfer_list_populate_ep_info(entry_point_info_t *bl32, } } } + return ret; } + +void *transfer_list_retrieve_dt_address(void) +{ + void *dtb = NULL; + struct transfer_list_entry *te = NULL; + + if ((tl_ops_holder == TL_OPS_ALL) || (tl_ops_holder == TL_OPS_RO)) { + te = transfer_list_find(tl_hdr, TL_TAG_FDT); + if (te != NULL) { + dtb = transfer_list_entry_data(te); + } + } + + return dtb; +} diff --git a/plat/amd/versal2/bl31_setup.c b/plat/amd/versal2/bl31_setup.c index 1914830f9..8f0ffb90b 100644 --- a/plat/amd/versal2/bl31_setup.c +++ b/plat/amd/versal2/bl31_setup.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -81,7 +81,10 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, (void)arg2; (void)arg3; uint32_t uart_clock; +#if (TRANSFER_LIST == 1) int32_t rc; + bool tl_status = false; +#endif board_detection(); @@ -124,6 +127,12 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, default: panic(); } +#if (TRANSFER_LIST == 1) + tl_status = populate_data_from_xfer_list(); + if (tl_status != true) { + WARN("Invalid transfer list\n"); + } +#endif uart_clock = get_uart_clk(); @@ -152,11 +161,15 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); +#if (TRANSFER_LIST == 1) rc = transfer_list_populate_ep_info(&bl32_image_ep_info, &bl33_image_ep_info); if (rc == TL_OPS_NON || rc == TL_OPS_CUS) { NOTICE("BL31: TL not found, using default config\n"); bl31_set_default_config(); } +#else + bl31_set_default_config(); +#endif long rev_var = cpu_get_rev_var(); diff --git a/plat/amd/versal2/platform.mk b/plat/amd/versal2/platform.mk index 18f03d867..04d3c97bd 100644 --- a/plat/amd/versal2/platform.mk +++ b/plat/amd/versal2/platform.mk @@ -129,11 +129,8 @@ BL31_SOURCES += drivers/arm/cci/cci.c \ drivers/scmi-msg/reset_domain.c \ ${PLAT_PATH}/scmi.c -BL31_SOURCES += ${PLAT_PATH}/plat_psci.c - -BL31_SOURCES += plat/xilinx/common/plat_fdt.c \ +BL31_SOURCES += ${PLAT_PATH}/plat_psci.c \ common/fdt_wrappers.c \ - plat/xilinx/common/plat_fdt.c \ plat/xilinx/common/plat_console.c \ plat/xilinx/common/plat_startup.c \ plat/xilinx/common/ipi.c \ @@ -156,5 +153,10 @@ endif # Enable Handoff protocol using transfer lists TRANSFER_LIST ?= 0 +ifeq (${TRANSFER_LIST},1) include lib/transfer_list/transfer_list.mk -BL31_SOURCES += plat/amd/common/plat_xfer_list.c +BL31_SOURCES += plat/amd/common/plat_fdt.c +BL31_SOURCES += plat/amd/common/plat_xfer_list.c +else +BL31_SOURCES += plat/xilinx/common/plat_fdt.c +endif diff --git a/plat/xilinx/common/include/plat_fdt.h b/plat/xilinx/common/include/plat_fdt.h index 47a678c75..48ffff3c6 100644 --- a/plat/xilinx/common/include/plat_fdt.h +++ b/plat/xilinx/common/include/plat_fdt.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2023-2025, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause * @@ -8,9 +8,7 @@ #define PLAT_FDT_H void prepare_dtb(void); - -#if defined(XILINX_OF_BOARD_DTB_ADDR) +uintptr_t plat_retrieve_dt_addr(void); int32_t is_valid_dtb(void *fdt); -#endif #endif /* PLAT_FDT_H */ diff --git a/plat/xilinx/common/plat_console.c b/plat/xilinx/common/plat_console.c index 681226f99..c53089531 100644 --- a/plat/xilinx/common/plat_console.c +++ b/plat/xilinx/common/plat_console.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2023-2025, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -222,7 +222,7 @@ error: static int fdt_get_uart_info(dt_uart_info_t *info) { int node = 0, ret = 0; - void *dtb = (void *)XILINX_OF_BOARD_DTB_ADDR; + void *dtb = (void *)plat_retrieve_dt_addr(); ret = is_valid_dtb(dtb); if (ret < 0) { diff --git a/plat/xilinx/common/plat_fdt.c b/plat/xilinx/common/plat_fdt.c index 4ad7b2d01..ae2c1ead0 100644 --- a/plat/xilinx/common/plat_fdt.c +++ b/plat/xilinx/common/plat_fdt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2023-2025, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause * @@ -105,7 +105,7 @@ void prepare_dtb(void) int map_ret = 0; int ret = 0; - dtb = (void *)XILINX_OF_BOARD_DTB_ADDR; + dtb = (void *)plat_retrieve_dt_addr(); if (!IS_TFA_IN_OCM(BL31_BASE)) { @@ -157,3 +157,13 @@ void prepare_dtb(void) } #endif } + +uintptr_t plat_retrieve_dt_addr(void) +{ + void *dtb = NULL; + +#if defined(XILINX_OF_BOARD_DTB_ADDR) + dtb = (void *)XILINX_OF_BOARD_DTB_ADDR; +#endif + return (uintptr_t)dtb; +}