mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-26 14:55:16 +00:00
feat(fdts stm32mp1): align DT with latest kernel
Update STM32MP1 device tree files with kernel 5.15. Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82 Signed-off-by: Yann Gautier <yann.gautier@st.com>
This commit is contained in:
parent
292bb9a768
commit
e8a953a9b8
12 changed files with 110 additions and 52 deletions
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@ -22,10 +22,6 @@
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/delete-node/ stgen@5c008000;
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/delete-node/ i2c@5c009000;
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/delete-node/ tamp@5c00a000;
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pin-controller@50002000 {
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/delete-node/ rtc-out2-rmp-pins-0;
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};
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};
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#if !STM32MP_USE_STM32IMAGE
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@ -20,8 +20,8 @@
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/delete-node/ hash@54002000;
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/delete-node/ memory-controller@58002000;
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/delete-node/ spi@58003000;
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/delete-node/ sdmmc@58005000;
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/delete-node/ sdmmc@58007000;
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/delete-node/ mmc@58005000;
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/delete-node/ mmc@58007000;
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/delete-node/ usbphyc@5a006000;
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/delete-node/ spi@5c001000;
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/delete-node/ stgen@5c008000;
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@ -37,6 +37,8 @@
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/delete-node/ sdmmc2-b4-0;
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/delete-node/ sdmmc2-b4-1;
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/delete-node/ sdmmc2-d47-0;
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/delete-node/ sdmmc2-d47-1;
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/delete-node/ sdmmc2-d47-3;
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/delete-node/ usbotg_hs-0;
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/delete-node/ usbotg-fs-dp-dm-0;
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};
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@ -86,12 +86,6 @@
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};
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};
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rtc_out2_rmp_pins_a: rtc-out2-rmp-pins-0 {
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pins {
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pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
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};
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};
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sdmmc1_b4_pins_a: sdmmc1-b4-0 {
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pins1 {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
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@ -176,6 +170,18 @@
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};
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};
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sdmmc2_d47_pins_b: sdmmc2-d47-1 {
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pins {
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pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
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<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
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<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
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<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
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slew-rate = <1>;
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drive-push-pull;
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bias-disable;
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};
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};
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sdmmc2_d47_pins_d: sdmmc2-d47-3 {
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pins {
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pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
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@ -213,33 +219,89 @@
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uart7_pins_a: uart7-0 {
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pins1 {
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pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
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pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
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<STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
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<STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
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pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
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<STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
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<STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
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bias-disable;
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};
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};
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uart7_pins_b: uart7-1 {
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pins1 {
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pinmux = <STM32_PINMUX('E', 8, AF7)>; /* USART7_TX */
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pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('E', 7, AF7)>; /* USART7_RX */
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pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
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bias-disable;
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};
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};
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uart7_pins_c: uart7-2 {
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pins1 {
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pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
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bias-disable;
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};
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};
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uart8_pins_a: uart8-0 {
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pins1 {
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pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
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bias-disable;
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};
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};
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usart2_pins_a: usart2-0 {
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pins1 {
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pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
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<STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
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<STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
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bias-disable;
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};
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};
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usart2_pins_b: usart2-1 {
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pins1 {
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pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
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<STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
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<STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
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bias-disable;
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};
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};
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usart2_pins_c: usart2-2 {
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pins1 {
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pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
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<STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
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@ -256,20 +318,33 @@
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usart3_pins_a: usart3-0 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
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<STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
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pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
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<STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
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pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
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bias-disable;
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};
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};
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usart3_pins_b: usart3-1 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
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<STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
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<STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
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bias-disable;
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};
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};
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usart3_pins_c: usart3-2 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
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<STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
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};
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};
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usbotg_hs_pins_a: usbotg_hs-0 {
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usbotg_hs_pins_a: usbotg-hs-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
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};
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@ -174,7 +174,7 @@
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};
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usbotg_hs: usb-otg@49000000 {
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compatible = "st,stm32mp1-hsotg", "snps,dwc2";
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compatible = "st,stm32mp15-hsotg", "snps,dwc2";
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reg = <0x49000000 0x10000>;
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clocks = <&rcc USBO_K>;
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clock-names = "otg";
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@ -319,7 +319,7 @@
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status = "disabled";
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};
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sdmmc1: sdmmc@58005000 {
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sdmmc1: mmc@58005000 {
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compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x00253180>;
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reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
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status = "disabled";
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};
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sdmmc2: sdmmc@58007000 {
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sdmmc2: mmc@58007000 {
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compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x00253180>;
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reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
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status = "disabled";
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};
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bsec: nvmem@5c005000 {
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bsec: efuse@5c005000 {
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compatible = "st,stm32mp15-bsec";
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reg = <0x5c005000 0x400>;
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#address-cells = <1>;
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@ -20,7 +20,6 @@
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stdout-path = "serial0:115200n8";
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};
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memory@c0000000 {
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device_type = "memory";
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reg = <0xC0000000 0x40000000>;
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};
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&cryp1 {
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status="okay";
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status = "okay";
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};
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&hash1 {
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@ -57,6 +57,7 @@
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&usart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&usart3_pins_a>;
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pinctrl-0 = <&usart3_pins_b>;
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uart-has-rtscts;
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status = "disabled";
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};
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&sdmmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2_b4_pins_a &mc1_sdmmc2_d47_pins_b>;
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pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
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bus-width = <8>;
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no-1-8-v;
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no-sd;
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pinctrl-0 = <&uart4_pins_a>;
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status = "okay";
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};
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&pinctrl {
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mc1_sdmmc2_d47_pins_b: mc1-sdmmc2-d47-1 {
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pins {
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pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
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<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
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<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
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<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
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slew-rate = <1>;
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drive-push-pull;
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bias-disable;
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};
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};
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};
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@ -141,7 +141,6 @@
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regulator-name = "vdd_usb";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdda: ldo5 {
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&uart7 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart7_pins_b>;
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pinctrl-0 = <&uart7_pins_c>;
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status = "disabled";
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};
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&usart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&usart3_pins_b>;
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pinctrl-0 = <&usart3_pins_c>;
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uart-has-rtscts;
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status = "disabled";
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};
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Author: Alexandre Torgue <alexandre.torgue@st.com>
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* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
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*/
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&pinctrl {
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Author: Alexandre Torgue <alexandre.torgue@st.com>
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* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
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*/
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&pinctrl {
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Author: Alexandre Torgue <alexandre.torgue@st.com>
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* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
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*/
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&pinctrl {
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Author: Alexandre Torgue <alexandre.torgue@st.com>
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* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
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*/
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&pinctrl {
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