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Merge "feat(fvp): allow configurable FVP Trusted SRAM size" into integration
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commit
e8947b27fe
3 changed files with 14 additions and 1 deletions
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@ -169,6 +169,12 @@ Arm CSS Platform-Specific Build Options
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require all the CPUs to execute the CPU specific power down sequence to
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complete a warm reboot sequence in which only the CPUs are power cycled.
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Arm FVP Build Options
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---------------------
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- ``FVP_TRUSTED_SRAM_SIZE``: Size (in kilobytes) of the Trusted SRAM region to
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utilize when building for the FVP platform. This option defaults to 256.
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--------------
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.. |FIP in a GPT image| image:: ../../resources/diagrams/FIP_in_a_GPT_image.png
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@ -43,7 +43,7 @@
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*/
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#define PLAT_ARM_CLUSTER_COUNT U(FVP_CLUSTER_COUNT)
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#define PLAT_ARM_TRUSTED_SRAM_SIZE UL(0x00040000) /* 256 KB */
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#define PLAT_ARM_TRUSTED_SRAM_SIZE (FVP_TRUSTED_SRAM_SIZE * UL(1024))
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#define PLAT_ARM_TRUSTED_ROM_BASE UL(0x00000000)
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#define PLAT_ARM_TRUSTED_ROM_SIZE UL(0x04000000) /* 64 MB */
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@ -24,6 +24,10 @@ FVP_GICR_REGION_PROTECTION := 0
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FVP_DT_PREFIX := fvp-base-gicv3-psci
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# Size (in kilobytes) of the Trusted SRAM region to utilize when building for
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# the FVP platform. This option defaults to 256.
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FVP_TRUSTED_SRAM_SIZE := 256
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# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
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# progbits limit. We need a way to build all useful configurations while waiting
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# on the fvp to increase its SRAM size. The problem is twofild:
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@ -104,6 +108,9 @@ $(eval $(call add_define,FVP_MAX_PE_PER_CPU))
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# Pass FVP_GICR_REGION_PROTECTION to the build system.
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$(eval $(call add_define,FVP_GICR_REGION_PROTECTION))
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# Pass FVP_TRUSTED_SRAM_SIZE to the build system.
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$(eval $(call add_define,FVP_TRUSTED_SRAM_SIZE))
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# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
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# choose the CCI driver , else the CCN driver
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ifeq ($(FVP_CLUSTER_COUNT), 0)
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